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path: root/drivers/gpu/nvgpu/gk20a/platform_gk20a_tegra.c
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Diffstat (limited to 'drivers/gpu/nvgpu/gk20a/platform_gk20a_tegra.c')
-rw-r--r--drivers/gpu/nvgpu/gk20a/platform_gk20a_tegra.c144
1 files changed, 71 insertions, 73 deletions
diff --git a/drivers/gpu/nvgpu/gk20a/platform_gk20a_tegra.c b/drivers/gpu/nvgpu/gk20a/platform_gk20a_tegra.c
index 15d6609d..468c9257 100644
--- a/drivers/gpu/nvgpu/gk20a/platform_gk20a_tegra.c
+++ b/drivers/gpu/nvgpu/gk20a/platform_gk20a_tegra.c
@@ -1,6 +1,4 @@
1/* 1/*
2 * drivers/video/tegra/host/gk20a/platform_gk20a_tegra.c
3 *
4 * GK20A Tegra Platform Interface 2 * GK20A Tegra Platform Interface
5 * 3 *
6 * Copyright (c) 2014-2016, NVIDIA CORPORATION. All rights reserved. 4 * Copyright (c) 2014-2016, NVIDIA CORPORATION. All rights reserved.
@@ -66,7 +64,7 @@ static inline void pmc_write(u32 val, unsigned long reg)
66#define MHZ_TO_HZ(x) ((x) * 1000000) 64#define MHZ_TO_HZ(x) ((x) * 1000000)
67#define HZ_TO_MHZ(x) ((x) / 1000000) 65#define HZ_TO_MHZ(x) ((x) / 1000000)
68 66
69static void gk20a_tegra_secure_page_destroy(struct platform_device *pdev, 67static void gk20a_tegra_secure_page_destroy(struct device *dev,
70 struct secure_page_buffer *secure_buffer) 68 struct secure_page_buffer *secure_buffer)
71{ 69{
72 dma_free_attrs(&tegra_vpr_dev, secure_buffer->size, 70 dma_free_attrs(&tegra_vpr_dev, secure_buffer->size,
@@ -74,9 +72,9 @@ static void gk20a_tegra_secure_page_destroy(struct platform_device *pdev,
74 secure_buffer->iova, &secure_buffer->attrs); 72 secure_buffer->iova, &secure_buffer->attrs);
75} 73}
76 74
77int gk20a_tegra_secure_page_alloc(struct platform_device *pdev) 75int gk20a_tegra_secure_page_alloc(struct device *dev)
78{ 76{
79 struct gk20a_platform *platform = platform_get_drvdata(pdev); 77 struct gk20a_platform *platform = dev_get_drvdata(dev);
80 struct secure_page_buffer *secure_buffer = &platform->secure_buffer; 78 struct secure_page_buffer *secure_buffer = &platform->secure_buffer;
81 DEFINE_DMA_ATTRS(attrs); 79 DEFINE_DMA_ATTRS(attrs);
82 dma_addr_t iova; 80 dma_addr_t iova;
@@ -113,12 +111,11 @@ static void gk20a_tegra_secure_destroy(struct gk20a *g,
113 } 111 }
114} 112}
115 113
116int gk20a_tegra_secure_alloc(struct platform_device *pdev, 114int gk20a_tegra_secure_alloc(struct device *dev,
117 struct gr_ctx_buffer_desc *desc, 115 struct gr_ctx_buffer_desc *desc,
118 size_t size) 116 size_t size)
119{ 117{
120 struct gk20a_platform *platform = platform_get_drvdata(pdev); 118 struct gk20a_platform *platform = dev_get_drvdata(dev);
121 struct device *dev = &pdev->dev;
122 DEFINE_DMA_ATTRS(attrs); 119 DEFINE_DMA_ATTRS(attrs);
123 dma_addr_t iova; 120 dma_addr_t iova;
124 struct sg_table *sgt; 121 struct sg_table *sgt;
@@ -198,13 +195,13 @@ static unsigned long gk20a_tegra_get_emc_rate(struct gk20a *g,
198 * This function sets emc frequency based on current gpu frequency 195 * This function sets emc frequency based on current gpu frequency
199 */ 196 */
200 197
201static void gk20a_tegra_postscale(struct platform_device *pdev, 198static void gk20a_tegra_postscale(struct device *dev,
202 unsigned long freq) 199 unsigned long freq)
203{ 200{
204 struct gk20a_platform *platform = platform_get_drvdata(pdev); 201 struct gk20a_platform *platform = dev_get_drvdata(dev);
205 struct gk20a_scale_profile *profile = platform->g->scale_profile; 202 struct gk20a_scale_profile *profile = platform->g->scale_profile;
206 struct gk20a_emc_params *emc_params = profile->private_data; 203 struct gk20a_emc_params *emc_params = profile->private_data;
207 struct gk20a *g = get_gk20a(pdev); 204 struct gk20a *g = get_gk20a(dev);
208 struct clk *emc_clk = platform->clk[2]; 205 struct clk *emc_clk = platform->clk[2];
209 enum tegra_chipid chip_id = tegra_get_chip_id(); 206 enum tegra_chipid chip_id = tegra_get_chip_id();
210 unsigned long emc_target; 207 unsigned long emc_target;
@@ -257,9 +254,9 @@ static void gk20a_tegra_postscale(struct platform_device *pdev,
257 * This function informs EDP about changed constraints. 254 * This function informs EDP about changed constraints.
258 */ 255 */
259 256
260static void gk20a_tegra_prescale(struct platform_device *pdev) 257static void gk20a_tegra_prescale(struct device *dev)
261{ 258{
262 struct gk20a *g = get_gk20a(pdev); 259 struct gk20a *g = get_gk20a(dev);
263 u32 avg = 0; 260 u32 avg = 0;
264 261
265 gk20a_pmu_load_norm(g, &avg); 262 gk20a_pmu_load_norm(g, &avg);
@@ -271,7 +268,7 @@ static void gk20a_tegra_prescale(struct platform_device *pdev)
271 * 268 *
272 */ 269 */
273 270
274static void gk20a_tegra_calibrate_emc(struct platform_device *pdev, 271static void gk20a_tegra_calibrate_emc(struct device *dev,
275 struct gk20a_emc_params *emc_params) 272 struct gk20a_emc_params *emc_params)
276{ 273{
277 enum tegra_chipid cid = tegra_get_chipid(); 274 enum tegra_chipid cid = tegra_get_chipid();
@@ -308,9 +305,9 @@ static void gk20a_tegra_calibrate_emc(struct platform_device *pdev,
308 * Check status of gk20a power rail 305 * Check status of gk20a power rail
309 */ 306 */
310 307
311static bool gk20a_tegra_is_railgated(struct platform_device *pdev) 308static bool gk20a_tegra_is_railgated(struct device *dev)
312{ 309{
313 struct gk20a_platform *platform = platform_get_drvdata(pdev); 310 struct gk20a_platform *platform = dev_get_drvdata(dev);
314 bool ret = false; 311 bool ret = false;
315 312
316 if (!tegra_platform_is_linsim()) 313 if (!tegra_platform_is_linsim())
@@ -325,9 +322,9 @@ static bool gk20a_tegra_is_railgated(struct platform_device *pdev)
325 * Gate (disable) gk20a power rail 322 * Gate (disable) gk20a power rail
326 */ 323 */
327 324
328static int gk20a_tegra_railgate(struct platform_device *pdev) 325static int gk20a_tegra_railgate(struct device *dev)
329{ 326{
330 struct gk20a_platform *platform = platform_get_drvdata(pdev); 327 struct gk20a_platform *platform = dev_get_drvdata(dev);
331 int ret = 0; 328 int ret = 0;
332 329
333 if (tegra_platform_is_linsim() || 330 if (tegra_platform_is_linsim() ||
@@ -344,7 +341,7 @@ static int gk20a_tegra_railgate(struct platform_device *pdev)
344 341
345 udelay(10); 342 udelay(10);
346 343
347 platform->reset_assert(pdev); 344 platform->reset_assert(dev);
348 345
349 udelay(10); 346 udelay(10);
350 347
@@ -367,7 +364,7 @@ static int gk20a_tegra_railgate(struct platform_device *pdev)
367 return 0; 364 return 0;
368 365
369err_power_off: 366err_power_off:
370 gk20a_err(&pdev->dev, "Could not railgate GPU"); 367 gk20a_err(dev, "Could not railgate GPU");
371 return ret; 368 return ret;
372} 369}
373 370
@@ -377,9 +374,9 @@ err_power_off:
377 * Gate (disable) gm20b power rail 374 * Gate (disable) gm20b power rail
378 */ 375 */
379 376
380static int gm20b_tegra_railgate(struct platform_device *pdev) 377static int gm20b_tegra_railgate(struct device *dev)
381{ 378{
382 struct gk20a_platform *platform = platform_get_drvdata(pdev); 379 struct gk20a_platform *platform = dev_get_drvdata(dev);
383 int ret = 0; 380 int ret = 0;
384 381
385 if (tegra_platform_is_linsim() || 382 if (tegra_platform_is_linsim() ||
@@ -396,7 +393,7 @@ static int gm20b_tegra_railgate(struct platform_device *pdev)
396 393
397 udelay(10); 394 udelay(10);
398 395
399 platform->reset_assert(pdev); 396 platform->reset_assert(dev);
400 397
401 udelay(10); 398 udelay(10);
402 399
@@ -422,7 +419,7 @@ static int gm20b_tegra_railgate(struct platform_device *pdev)
422 return 0; 419 return 0;
423 420
424err_power_off: 421err_power_off:
425 gk20a_err(&pdev->dev, "Could not railgate GPU"); 422 gk20a_err(dev, "Could not railgate GPU");
426 return ret; 423 return ret;
427} 424}
428 425
@@ -432,9 +429,9 @@ err_power_off:
432 * Ungate (enable) gk20a power rail 429 * Ungate (enable) gk20a power rail
433 */ 430 */
434 431
435static int gk20a_tegra_unrailgate(struct platform_device *pdev) 432static int gk20a_tegra_unrailgate(struct device *dev)
436{ 433{
437 struct gk20a_platform *platform = platform_get_drvdata(pdev); 434 struct gk20a_platform *platform = dev_get_drvdata(dev);
438 int ret = 0; 435 int ret = 0;
439 bool first = false; 436 bool first = false;
440 437
@@ -457,19 +454,19 @@ static int gk20a_tegra_unrailgate(struct platform_device *pdev)
457 if (!first) { 454 if (!first) {
458 ret = clk_enable(platform->clk[0]); 455 ret = clk_enable(platform->clk[0]);
459 if (ret) { 456 if (ret) {
460 gk20a_err(&pdev->dev, "could not turn on gpu pll"); 457 gk20a_err(dev, "could not turn on gpu pll");
461 goto err_clk_on; 458 goto err_clk_on;
462 } 459 }
463 ret = clk_enable(platform->clk[1]); 460 ret = clk_enable(platform->clk[1]);
464 if (ret) { 461 if (ret) {
465 gk20a_err(&pdev->dev, "could not turn on pwr clock"); 462 gk20a_err(dev, "could not turn on pwr clock");
466 goto err_clk_on; 463 goto err_clk_on;
467 } 464 }
468 } 465 }
469 466
470 udelay(10); 467 udelay(10);
471 468
472 platform->reset_assert(pdev); 469 platform->reset_assert(dev);
473 470
474 udelay(10); 471 udelay(10);
475 472
@@ -478,7 +475,7 @@ static int gk20a_tegra_unrailgate(struct platform_device *pdev)
478 475
479 udelay(10); 476 udelay(10);
480 477
481 platform->reset_deassert(pdev); 478 platform->reset_deassert(dev);
482 479
483 /* Flush MC after boot/railgate/SC7 */ 480 /* Flush MC after boot/railgate/SC7 */
484 tegra_mc_flush(MC_CLIENT_GPU); 481 tegra_mc_flush(MC_CLIENT_GPU);
@@ -503,9 +500,9 @@ err_clk_on:
503 * Ungate (enable) gm20b power rail 500 * Ungate (enable) gm20b power rail
504 */ 501 */
505 502
506static int gm20b_tegra_unrailgate(struct platform_device *pdev) 503static int gm20b_tegra_unrailgate(struct device *dev)
507{ 504{
508 struct gk20a_platform *platform = platform_get_drvdata(pdev); 505 struct gk20a_platform *platform = dev_get_drvdata(dev);
509 int ret = 0; 506 int ret = 0;
510 bool first = false; 507 bool first = false;
511 508
@@ -530,25 +527,25 @@ static int gm20b_tegra_unrailgate(struct platform_device *pdev)
530 if (!first) { 527 if (!first) {
531 ret = clk_enable(platform->clk_reset); 528 ret = clk_enable(platform->clk_reset);
532 if (ret) { 529 if (ret) {
533 gk20a_err(&pdev->dev, "could not turn on gpu_gate"); 530 gk20a_err(dev, "could not turn on gpu_gate");
534 goto err_clk_on; 531 goto err_clk_on;
535 } 532 }
536 533
537 ret = clk_enable(platform->clk[0]); 534 ret = clk_enable(platform->clk[0]);
538 if (ret) { 535 if (ret) {
539 gk20a_err(&pdev->dev, "could not turn on gpu pll"); 536 gk20a_err(dev, "could not turn on gpu pll");
540 goto err_clk_on; 537 goto err_clk_on;
541 } 538 }
542 ret = clk_enable(platform->clk[1]); 539 ret = clk_enable(platform->clk[1]);
543 if (ret) { 540 if (ret) {
544 gk20a_err(&pdev->dev, "could not turn on pwr clock"); 541 gk20a_err(dev, "could not turn on pwr clock");
545 goto err_clk_on; 542 goto err_clk_on;
546 } 543 }
547 } 544 }
548 545
549 udelay(10); 546 udelay(10);
550 547
551 platform->reset_assert(pdev); 548 platform->reset_assert(dev);
552 549
553 udelay(10); 550 udelay(10);
554 551
@@ -558,7 +555,7 @@ static int gm20b_tegra_unrailgate(struct platform_device *pdev)
558 udelay(10); 555 udelay(10);
559 556
560 clk_disable(platform->clk_reset); 557 clk_disable(platform->clk_reset);
561 platform->reset_deassert(pdev); 558 platform->reset_deassert(dev);
562 clk_enable(platform->clk_reset); 559 clk_enable(platform->clk_reset);
563 560
564 /* Flush MC after boot/railgate/SC7 */ 561 /* Flush MC after boot/railgate/SC7 */
@@ -594,16 +591,14 @@ static struct {
594 * the clock information to gk20a platform data. 591 * the clock information to gk20a platform data.
595 */ 592 */
596 593
597static int gk20a_tegra_get_clocks(struct platform_device *pdev) 594static int gk20a_tegra_get_clocks(struct device *dev)
598{ 595{
599 struct gk20a_platform *platform = platform_get_drvdata(pdev); 596 struct gk20a_platform *platform = dev_get_drvdata(dev);
600 char devname[16]; 597 char devname[16];
601 int i; 598 int i;
602 int ret = 0; 599 int ret = 0;
603 600
604 snprintf(devname, sizeof(devname), 601 snprintf(devname, sizeof(devname), "tegra_%s", dev_name(dev));
605 (pdev->id <= 0) ? "tegra_%s" : "tegra_%s.%d\n",
606 pdev->name, pdev->id);
607 602
608 platform->num_clks = 0; 603 platform->num_clks = 0;
609 for (i = 0; i < ARRAY_SIZE(tegra_gk20a_clocks); i++) { 604 for (i = 0; i < ARRAY_SIZE(tegra_gk20a_clocks); i++) {
@@ -630,7 +625,7 @@ err_get_clock:
630 return ret; 625 return ret;
631} 626}
632 627
633static int gk20a_tegra_reset_assert(struct platform_device *dev) 628static int gk20a_tegra_reset_assert(struct device *dev)
634{ 629{
635 struct gk20a_platform *platform = gk20a_get_platform(dev); 630 struct gk20a_platform *platform = gk20a_get_platform(dev);
636 631
@@ -642,7 +637,7 @@ static int gk20a_tegra_reset_assert(struct platform_device *dev)
642 return 0; 637 return 0;
643} 638}
644 639
645static int gk20a_tegra_reset_deassert(struct platform_device *dev) 640static int gk20a_tegra_reset_deassert(struct device *dev)
646{ 641{
647 struct gk20a_platform *platform = gk20a_get_platform(dev); 642 struct gk20a_platform *platform = gk20a_get_platform(dev);
648 643
@@ -654,14 +649,14 @@ static int gk20a_tegra_reset_deassert(struct platform_device *dev)
654 return 0; 649 return 0;
655} 650}
656 651
657static int gm20b_tegra_reset_assert(struct platform_device *dev) 652static int gm20b_tegra_reset_assert(struct device *dev)
658{ 653{
659 struct gk20a_platform *platform = gk20a_get_platform(dev); 654 struct gk20a_platform *platform = gk20a_get_platform(dev);
660 655
661 if (!platform->clk_reset) { 656 if (!platform->clk_reset) {
662 platform->clk_reset = clk_get(&dev->dev, "gpu_gate"); 657 platform->clk_reset = clk_get(dev, "gpu_gate");
663 if (IS_ERR(platform->clk_reset)) { 658 if (IS_ERR(platform->clk_reset)) {
664 gk20a_err(&dev->dev, "fail to get gpu reset clk\n"); 659 gk20a_err(dev, "fail to get gpu reset clk\n");
665 return PTR_ERR(platform->clk_reset); 660 return PTR_ERR(platform->clk_reset);
666 } 661 }
667 } 662 }
@@ -671,9 +666,9 @@ static int gm20b_tegra_reset_assert(struct platform_device *dev)
671 return 0; 666 return 0;
672} 667}
673 668
674static void gk20a_tegra_scale_init(struct platform_device *pdev) 669static void gk20a_tegra_scale_init(struct device *dev)
675{ 670{
676 struct gk20a_platform *platform = gk20a_get_platform(pdev); 671 struct gk20a_platform *platform = gk20a_get_platform(dev);
677 struct gk20a_scale_profile *profile = platform->g->scale_profile; 672 struct gk20a_scale_profile *profile = platform->g->scale_profile;
678 struct gk20a_emc_params *emc_params; 673 struct gk20a_emc_params *emc_params;
679 674
@@ -685,28 +680,28 @@ static void gk20a_tegra_scale_init(struct platform_device *pdev)
685 return; 680 return;
686 681
687 emc_params->freq_last_set = -1; 682 emc_params->freq_last_set = -1;
688 gk20a_tegra_calibrate_emc(pdev, emc_params); 683 gk20a_tegra_calibrate_emc(dev, emc_params);
689 684
690 profile->private_data = emc_params; 685 profile->private_data = emc_params;
691} 686}
692 687
693static void gk20a_tegra_scale_exit(struct platform_device *pdev) 688static void gk20a_tegra_scale_exit(struct device *dev)
694{ 689{
695 struct gk20a_platform *platform = gk20a_get_platform(pdev); 690 struct gk20a_platform *platform = dev_get_drvdata(dev);
696 struct gk20a_scale_profile *profile = platform->g->scale_profile; 691 struct gk20a_scale_profile *profile = platform->g->scale_profile;
697 692
698 if (profile) 693 if (profile)
699 kfree(profile->private_data); 694 kfree(profile->private_data);
700} 695}
701 696
702void gk20a_tegra_debug_dump(struct platform_device *pdev) 697void gk20a_tegra_debug_dump(struct device *dev)
703{ 698{
704 struct gk20a_platform *platform = gk20a_get_platform(pdev); 699 struct gk20a_platform *platform = gk20a_get_platform(dev);
705 struct gk20a *g = platform->g; 700 struct gk20a *g = platform->g;
706 nvhost_debug_dump_device(g->host1x_dev); 701 nvhost_debug_dump_device(g->host1x_dev);
707} 702}
708 703
709int gk20a_tegra_busy(struct platform_device *dev) 704int gk20a_tegra_busy(struct device *dev)
710{ 705{
711 struct gk20a_platform *platform = gk20a_get_platform(dev); 706 struct gk20a_platform *platform = gk20a_get_platform(dev);
712 struct gk20a *g = platform->g; 707 struct gk20a *g = platform->g;
@@ -716,7 +711,7 @@ int gk20a_tegra_busy(struct platform_device *dev)
716 return 0; 711 return 0;
717} 712}
718 713
719void gk20a_tegra_idle(struct platform_device *dev) 714void gk20a_tegra_idle(struct device *dev)
720{ 715{
721 struct gk20a_platform *platform = gk20a_get_platform(dev); 716 struct gk20a_platform *platform = gk20a_get_platform(dev);
722 struct gk20a *g = platform->g; 717 struct gk20a *g = platform->g;
@@ -725,10 +720,10 @@ void gk20a_tegra_idle(struct platform_device *dev)
725 nvhost_module_idle_ext(g->host1x_dev); 720 nvhost_module_idle_ext(g->host1x_dev);
726} 721}
727 722
728static int gk20a_tegra_probe(struct platform_device *dev) 723static int gk20a_tegra_probe(struct device *dev)
729{ 724{
730 struct gk20a_platform *platform = gk20a_get_platform(dev); 725 struct gk20a_platform *platform = dev_get_drvdata(dev);
731 struct device_node *np = dev->dev.of_node; 726 struct device_node *np = dev->of_node;
732 const __be32 *host1x_ptr; 727 const __be32 *host1x_ptr;
733 struct platform_device *host1x_pdev = NULL; 728 struct platform_device *host1x_pdev = NULL;
734 729
@@ -739,13 +734,13 @@ static int gk20a_tegra_probe(struct platform_device *dev)
739 734
740 host1x_pdev = of_find_device_by_node(host1x_node); 735 host1x_pdev = of_find_device_by_node(host1x_node);
741 if (!host1x_pdev) { 736 if (!host1x_pdev) {
742 dev_warn(&dev->dev, "host1x device not available"); 737 dev_warn(dev, "host1x device not available");
743 return -EPROBE_DEFER; 738 return -EPROBE_DEFER;
744 } 739 }
745 740
746 } else { 741 } else {
747 host1x_pdev = to_platform_device(dev->dev.parent); 742 host1x_pdev = to_platform_device(dev->parent);
748 dev_warn(&dev->dev, "host1x reference not found. assuming host1x to be parent"); 743 dev_warn(dev, "host1x reference not found. assuming host1x to be parent");
749 } 744 }
750 745
751 platform->g->host1x_dev = host1x_pdev; 746 platform->g->host1x_dev = host1x_pdev;
@@ -761,7 +756,7 @@ static int gk20a_tegra_probe(struct platform_device *dev)
761 np = of_find_node_by_path("/gpu-dvfs-rework"); 756 np = of_find_node_by_path("/gpu-dvfs-rework");
762 if (!(np && of_device_is_available(np))) { 757 if (!(np && of_device_is_available(np))) {
763 platform->devfreq_governor = ""; 758 platform->devfreq_governor = "";
764 dev_warn(&dev->dev, "board does not support scaling"); 759 dev_warn(dev, "board does not support scaling");
765 } 760 }
766 } 761 }
767 762
@@ -770,10 +765,10 @@ static int gk20a_tegra_probe(struct platform_device *dev)
770 return 0; 765 return 0;
771} 766}
772 767
773static int gk20a_tegra_late_probe(struct platform_device *dev) 768static int gk20a_tegra_late_probe(struct device *dev)
774{ 769{
775 /* Make gk20a power domain a subdomain of host1x */ 770 /* Make gk20a power domain a subdomain of host1x */
776 nvhost_register_client_domain(dev_to_genpd(&dev->dev)); 771 nvhost_register_client_domain(dev_to_genpd(dev));
777 772
778 /* Initialise tegra specific scaling quirks */ 773 /* Initialise tegra specific scaling quirks */
779 gk20a_tegra_scale_init(dev); 774 gk20a_tegra_scale_init(dev);
@@ -781,15 +776,15 @@ static int gk20a_tegra_late_probe(struct platform_device *dev)
781 return 0; 776 return 0;
782} 777}
783 778
784static int gk20a_tegra_remove(struct platform_device *dev) 779static int gk20a_tegra_remove(struct device *dev)
785{ 780{
786 struct gk20a_platform *platform = gk20a_get_platform(dev); 781 struct gk20a_platform *platform = dev_get_drvdata(dev);
787 782
788 if (platform->g->host1x_dev) 783 if (platform->g->host1x_dev)
789 nvhost_unregister_dump_device(platform->g->host1x_dev); 784 nvhost_unregister_dump_device(platform->g->host1x_dev);
790 785
791 /* remove gk20a power subdomain from host1x */ 786 /* remove gk20a power subdomain from host1x */
792 nvhost_unregister_client_domain(dev_to_genpd(&dev->dev)); 787 nvhost_unregister_client_domain(dev_to_genpd(dev));
793 788
794 /* deinitialise tegra specific scaling quirks */ 789 /* deinitialise tegra specific scaling quirks */
795 gk20a_tegra_scale_exit(dev); 790 gk20a_tegra_scale_exit(dev);
@@ -804,7 +799,7 @@ static int gk20a_tegra_suspend(struct device *dev)
804} 799}
805 800
806#ifdef CONFIG_TEGRA_CLK_FRAMEWORK 801#ifdef CONFIG_TEGRA_CLK_FRAMEWORK
807static unsigned long gk20a_get_clk_rate(struct platform_device *dev) 802static unsigned long gk20a_get_clk_rate(struct device *dev)
808{ 803{
809 struct gk20a_platform *platform = gk20a_get_platform(dev); 804 struct gk20a_platform *platform = gk20a_get_platform(dev);
810 struct gk20a *g = platform->g; 805 struct gk20a *g = platform->g;
@@ -813,8 +808,7 @@ static unsigned long gk20a_get_clk_rate(struct platform_device *dev)
813 808
814} 809}
815 810
816static long gk20a_round_clk_rate(struct platform_device *dev, 811static long gk20a_round_clk_rate(struct device *dev, unsigned long rate)
817 unsigned long rate)
818{ 812{
819 struct gk20a_platform *platform = gk20a_get_platform(dev); 813 struct gk20a_platform *platform = gk20a_get_platform(dev);
820 struct gk20a *g = platform->g; 814 struct gk20a *g = platform->g;
@@ -822,7 +816,7 @@ static long gk20a_round_clk_rate(struct platform_device *dev,
822 return gk20a_clk_round_rate(g, rate); 816 return gk20a_clk_round_rate(g, rate);
823} 817}
824 818
825static int gk20a_set_clk_rate(struct platform_device *dev, unsigned long rate) 819static int gk20a_set_clk_rate(struct device *dev, unsigned long rate)
826{ 820{
827 struct gk20a_platform *platform = gk20a_get_platform(dev); 821 struct gk20a_platform *platform = gk20a_get_platform(dev);
828 struct gk20a *g = platform->g; 822 struct gk20a *g = platform->g;
@@ -830,7 +824,7 @@ static int gk20a_set_clk_rate(struct platform_device *dev, unsigned long rate)
830 return gk20a_clk_set_rate(g, rate); 824 return gk20a_clk_set_rate(g, rate);
831} 825}
832 826
833static int gk20a_clk_get_freqs(struct platform_device *dev, 827static int gk20a_clk_get_freqs(struct device *dev,
834 unsigned long **freqs, int *num_freqs) 828 unsigned long **freqs, int *num_freqs)
835{ 829{
836 struct gk20a_platform *platform = gk20a_get_platform(dev); 830 struct gk20a_platform *platform = gk20a_get_platform(dev);
@@ -900,6 +894,8 @@ struct gk20a_platform gk20a_tegra_platform = {
900 .secure_alloc = gk20a_tegra_secure_alloc, 894 .secure_alloc = gk20a_tegra_secure_alloc,
901 .secure_page_alloc = gk20a_tegra_secure_page_alloc, 895 .secure_page_alloc = gk20a_tegra_secure_page_alloc,
902 .dump_platform_dependencies = gk20a_tegra_debug_dump, 896 .dump_platform_dependencies = gk20a_tegra_debug_dump,
897
898 .soc_name = "tegra12x",
903}; 899};
904 900
905struct gk20a_platform gm20b_tegra_platform = { 901struct gk20a_platform gm20b_tegra_platform = {
@@ -958,4 +954,6 @@ struct gk20a_platform gm20b_tegra_platform = {
958 .dump_platform_dependencies = gk20a_tegra_debug_dump, 954 .dump_platform_dependencies = gk20a_tegra_debug_dump,
959 955
960 .has_cde = true, 956 .has_cde = true,
957
958 .soc_name = "tegra21x",
961}; 959};