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path: root/drivers/gpu/nvgpu/gk20a/platform_gk20a_generic.c
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Diffstat (limited to 'drivers/gpu/nvgpu/gk20a/platform_gk20a_generic.c')
-rw-r--r--drivers/gpu/nvgpu/gk20a/platform_gk20a_generic.c90
1 files changed, 0 insertions, 90 deletions
diff --git a/drivers/gpu/nvgpu/gk20a/platform_gk20a_generic.c b/drivers/gpu/nvgpu/gk20a/platform_gk20a_generic.c
deleted file mode 100644
index 33e2fb37..00000000
--- a/drivers/gpu/nvgpu/gk20a/platform_gk20a_generic.c
+++ /dev/null
@@ -1,90 +0,0 @@
1/*
2 * drivers/gpu/nvgpu/gk20a/platform_gk20a_generic.c
3 *
4 * GK20A Generic Platform Interface
5 *
6 * Copyright (c) 2014-2015, NVIDIA CORPORATION. All rights reserved.
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms and conditions of the GNU General Public License,
10 * version 2, as published by the Free Software Foundation.
11 *
12 * This program is distributed in the hope it will be useful, but WITHOUT
13 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 * more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program. If not, see <http://www.gnu.org/licenses/>.
19 */
20
21#include <linux/clk.h>
22
23#include "platform_gk20a.h"
24#include "hal_gk20a.h"
25#include "gk20a.h"
26
27/*
28 * gk20a_generic_get_clocks()
29 *
30 * This function finds clocks in tegra platform and populates
31 * the clock information to gk20a platform data.
32 */
33
34static int gk20a_generic_get_clocks(struct device *pdev)
35{
36 struct gk20a_platform *platform = dev_get_drvdata(pdev);
37
38 platform->clk[0] = clk_get_sys("tegra_gk20a.0", "PLLG_ref");
39 platform->clk[1] = clk_get_sys("tegra_gk20a.0", "pwr");
40 platform->clk[2] = clk_get_sys("tegra_gk20a.0", "emc");
41 platform->num_clks = 3;
42
43 if (IS_ERR(platform->clk[0]) ||
44 IS_ERR(platform->clk[1]) ||
45 IS_ERR(platform->clk[2]))
46 goto err_get_clock;
47
48 clk_set_rate(platform->clk[0], UINT_MAX);
49 clk_set_rate(platform->clk[1], 204000000);
50 clk_set_rate(platform->clk[2], UINT_MAX);
51
52 return 0;
53
54err_get_clock:
55 if (!IS_ERR_OR_NULL(platform->clk[0]))
56 clk_put(platform->clk[0]);
57 if (!IS_ERR_OR_NULL(platform->clk[1]))
58 clk_put(platform->clk[1]);
59 if (!IS_ERR_OR_NULL(platform->clk[2]))
60 clk_put(platform->clk[2]);
61
62 platform->clk[0] = NULL;
63 platform->clk[1] = NULL;
64 platform->clk[2] = NULL;
65 return -ENODEV;
66}
67
68static int gk20a_generic_probe(struct device *dev)
69{
70 gk20a_generic_get_clocks(dev);
71
72 return 0;
73}
74
75static int gk20a_generic_late_probe(struct device *dev)
76{
77 return 0;
78}
79
80static int gk20a_generic_remove(struct device *dev)
81{
82 return 0;
83}
84
85struct gk20a_platform gk20a_generic_platform = {
86 .probe = gk20a_generic_probe,
87 .late_probe = gk20a_generic_late_probe,
88 .remove = gk20a_generic_remove,
89 .default_big_page_size = SZ_128K,
90};