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path: root/drivers/gpu/nvgpu/gk20a/mm_gk20a.c
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Diffstat (limited to 'drivers/gpu/nvgpu/gk20a/mm_gk20a.c')
-rw-r--r--drivers/gpu/nvgpu/gk20a/mm_gk20a.c28
1 files changed, 14 insertions, 14 deletions
diff --git a/drivers/gpu/nvgpu/gk20a/mm_gk20a.c b/drivers/gpu/nvgpu/gk20a/mm_gk20a.c
index 14876296..dfdcc3a4 100644
--- a/drivers/gpu/nvgpu/gk20a/mm_gk20a.c
+++ b/drivers/gpu/nvgpu/gk20a/mm_gk20a.c
@@ -91,7 +91,7 @@ int gk20a_init_mm_setup_hw(struct gk20a *g)
91 struct mm_gk20a *mm = &g->mm; 91 struct mm_gk20a *mm = &g->mm;
92 int err; 92 int err;
93 93
94 gk20a_dbg_fn(""); 94 nvgpu_log_fn(g, " ");
95 95
96 g->ops.fb.set_mmu_page_size(g); 96 g->ops.fb.set_mmu_page_size(g);
97 if (g->ops.fb.set_use_full_comp_tag_line) 97 if (g->ops.fb.set_use_full_comp_tag_line)
@@ -112,7 +112,7 @@ int gk20a_init_mm_setup_hw(struct gk20a *g)
112 if (gk20a_mm_fb_flush(g) || gk20a_mm_fb_flush(g)) 112 if (gk20a_mm_fb_flush(g) || gk20a_mm_fb_flush(g))
113 return -EBUSY; 113 return -EBUSY;
114 114
115 gk20a_dbg_fn("done"); 115 nvgpu_log_fn(g, "done");
116 return 0; 116 return 0;
117} 117}
118 118
@@ -336,7 +336,7 @@ int gk20a_vm_bind_channel(struct vm_gk20a *vm, struct channel_gk20a *ch)
336{ 336{
337 int err = 0; 337 int err = 0;
338 338
339 gk20a_dbg_fn(""); 339 nvgpu_log_fn(ch->g, " ");
340 340
341 nvgpu_vm_get(vm); 341 nvgpu_vm_get(vm);
342 ch->vm = vm; 342 ch->vm = vm;
@@ -357,7 +357,7 @@ void gk20a_mm_init_pdb(struct gk20a *g, struct nvgpu_mem *inst_block,
357 u32 pdb_addr_lo = u64_lo32(pdb_addr >> ram_in_base_shift_v()); 357 u32 pdb_addr_lo = u64_lo32(pdb_addr >> ram_in_base_shift_v());
358 u32 pdb_addr_hi = u64_hi32(pdb_addr); 358 u32 pdb_addr_hi = u64_hi32(pdb_addr);
359 359
360 gk20a_dbg_info("pde pa=0x%llx", pdb_addr); 360 nvgpu_log_info(g, "pde pa=0x%llx", pdb_addr);
361 361
362 nvgpu_mem_wr32(g, inst_block, ram_in_page_dir_base_lo_w(), 362 nvgpu_mem_wr32(g, inst_block, ram_in_page_dir_base_lo_w(),
363 nvgpu_aperture_mask(g, vm->pdb.mem, 363 nvgpu_aperture_mask(g, vm->pdb.mem,
@@ -376,7 +376,7 @@ void gk20a_init_inst_block(struct nvgpu_mem *inst_block, struct vm_gk20a *vm,
376{ 376{
377 struct gk20a *g = gk20a_from_vm(vm); 377 struct gk20a *g = gk20a_from_vm(vm);
378 378
379 gk20a_dbg_info("inst block phys = 0x%llx, kv = 0x%p", 379 nvgpu_log_info(g, "inst block phys = 0x%llx, kv = 0x%p",
380 nvgpu_inst_block_addr(g, inst_block), inst_block->cpu_va); 380 nvgpu_inst_block_addr(g, inst_block), inst_block->cpu_va);
381 381
382 g->ops.mm.init_pdb(g, inst_block, vm); 382 g->ops.mm.init_pdb(g, inst_block, vm);
@@ -395,7 +395,7 @@ int gk20a_alloc_inst_block(struct gk20a *g, struct nvgpu_mem *inst_block)
395{ 395{
396 int err; 396 int err;
397 397
398 gk20a_dbg_fn(""); 398 nvgpu_log_fn(g, " ");
399 399
400 err = nvgpu_dma_alloc(g, ram_in_alloc_size_v(), inst_block); 400 err = nvgpu_dma_alloc(g, ram_in_alloc_size_v(), inst_block);
401 if (err) { 401 if (err) {
@@ -403,7 +403,7 @@ int gk20a_alloc_inst_block(struct gk20a *g, struct nvgpu_mem *inst_block)
403 return err; 403 return err;
404 } 404 }
405 405
406 gk20a_dbg_fn("done"); 406 nvgpu_log_fn(g, "done");
407 return 0; 407 return 0;
408} 408}
409 409
@@ -415,7 +415,7 @@ int gk20a_mm_fb_flush(struct gk20a *g)
415 struct nvgpu_timeout timeout; 415 struct nvgpu_timeout timeout;
416 u32 retries; 416 u32 retries;
417 417
418 gk20a_dbg_fn(""); 418 nvgpu_log_fn(g, " ");
419 419
420 gk20a_busy_noresume(g); 420 gk20a_busy_noresume(g);
421 if (!g->power_on) { 421 if (!g->power_on) {
@@ -448,7 +448,7 @@ int gk20a_mm_fb_flush(struct gk20a *g)
448 flush_fb_flush_outstanding_true_v() || 448 flush_fb_flush_outstanding_true_v() ||
449 flush_fb_flush_pending_v(data) == 449 flush_fb_flush_pending_v(data) ==
450 flush_fb_flush_pending_busy_v()) { 450 flush_fb_flush_pending_busy_v()) {
451 gk20a_dbg_info("fb_flush 0x%x", data); 451 nvgpu_log_info(g, "fb_flush 0x%x", data);
452 nvgpu_udelay(5); 452 nvgpu_udelay(5);
453 } else 453 } else
454 break; 454 break;
@@ -494,7 +494,7 @@ static void gk20a_mm_l2_invalidate_locked(struct gk20a *g)
494 flush_l2_system_invalidate_outstanding_true_v() || 494 flush_l2_system_invalidate_outstanding_true_v() ||
495 flush_l2_system_invalidate_pending_v(data) == 495 flush_l2_system_invalidate_pending_v(data) ==
496 flush_l2_system_invalidate_pending_busy_v()) { 496 flush_l2_system_invalidate_pending_busy_v()) {
497 gk20a_dbg_info("l2_system_invalidate 0x%x", 497 nvgpu_log_info(g, "l2_system_invalidate 0x%x",
498 data); 498 data);
499 nvgpu_udelay(5); 499 nvgpu_udelay(5);
500 } else 500 } else
@@ -526,7 +526,7 @@ void gk20a_mm_l2_flush(struct gk20a *g, bool invalidate)
526 struct nvgpu_timeout timeout; 526 struct nvgpu_timeout timeout;
527 u32 retries = 2000; 527 u32 retries = 2000;
528 528
529 gk20a_dbg_fn(""); 529 nvgpu_log_fn(g, " ");
530 530
531 gk20a_busy_noresume(g); 531 gk20a_busy_noresume(g);
532 if (!g->power_on) 532 if (!g->power_on)
@@ -553,7 +553,7 @@ void gk20a_mm_l2_flush(struct gk20a *g, bool invalidate)
553 flush_l2_flush_dirty_outstanding_true_v() || 553 flush_l2_flush_dirty_outstanding_true_v() ||
554 flush_l2_flush_dirty_pending_v(data) == 554 flush_l2_flush_dirty_pending_v(data) ==
555 flush_l2_flush_dirty_pending_busy_v()) { 555 flush_l2_flush_dirty_pending_busy_v()) {
556 gk20a_dbg_info("l2_flush_dirty 0x%x", data); 556 nvgpu_log_info(g, "l2_flush_dirty 0x%x", data);
557 nvgpu_udelay(5); 557 nvgpu_udelay(5);
558 } else 558 } else
559 break; 559 break;
@@ -578,7 +578,7 @@ void gk20a_mm_cbc_clean(struct gk20a *g)
578 struct nvgpu_timeout timeout; 578 struct nvgpu_timeout timeout;
579 u32 retries = 200; 579 u32 retries = 200;
580 580
581 gk20a_dbg_fn(""); 581 nvgpu_log_fn(g, " ");
582 582
583 gk20a_busy_noresume(g); 583 gk20a_busy_noresume(g);
584 if (!g->power_on) 584 if (!g->power_on)
@@ -602,7 +602,7 @@ void gk20a_mm_cbc_clean(struct gk20a *g)
602 flush_l2_clean_comptags_outstanding_true_v() || 602 flush_l2_clean_comptags_outstanding_true_v() ||
603 flush_l2_clean_comptags_pending_v(data) == 603 flush_l2_clean_comptags_pending_v(data) ==
604 flush_l2_clean_comptags_pending_busy_v()) { 604 flush_l2_clean_comptags_pending_busy_v()) {
605 gk20a_dbg_info("l2_clean_comptags 0x%x", data); 605 nvgpu_log_info(g, "l2_clean_comptags 0x%x", data);
606 nvgpu_udelay(5); 606 nvgpu_udelay(5);
607 } else 607 } else
608 break; 608 break;