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path: root/drivers/gpu/nvgpu/gk20a/mc_gk20a.c
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Diffstat (limited to 'drivers/gpu/nvgpu/gk20a/mc_gk20a.c')
-rw-r--r--drivers/gpu/nvgpu/gk20a/mc_gk20a.c23
1 files changed, 23 insertions, 0 deletions
diff --git a/drivers/gpu/nvgpu/gk20a/mc_gk20a.c b/drivers/gpu/nvgpu/gk20a/mc_gk20a.c
index 9ee24ed0..26084bd6 100644
--- a/drivers/gpu/nvgpu/gk20a/mc_gk20a.c
+++ b/drivers/gpu/nvgpu/gk20a/mc_gk20a.c
@@ -121,6 +121,14 @@ u32 mc_gk20a_isr_nonstall(struct gk20a *g)
121 return ops; 121 return ops;
122} 122}
123 123
124void mc_gk20a_intr_mask(struct gk20a *g)
125{
126 nvgpu_writel(g, mc_intr_en_0_r(),
127 mc_intr_en_0_inta_disabled_f());
128 nvgpu_writel(g, mc_intr_en_1_r(),
129 mc_intr_en_1_inta_disabled_f());
130}
131
124void mc_gk20a_intr_enable(struct gk20a *g) 132void mc_gk20a_intr_enable(struct gk20a *g)
125{ 133{
126 u32 eng_intr_mask = gk20a_fifo_engine_interrupt_mask(g); 134 u32 eng_intr_mask = gk20a_fifo_engine_interrupt_mask(g);
@@ -292,6 +300,21 @@ bool mc_gk20a_is_intr1_pending(struct gk20a *g,
292 return is_pending; 300 return is_pending;
293} 301}
294 302
303void mc_gk20a_log_pending_intrs(struct gk20a *g)
304{
305 u32 intr;
306
307 intr = g->ops.mc.intr_stall(g);
308 if (intr != 0U) {
309 nvgpu_info(g, "Pending stall intr0=0x%08x", intr);
310 }
311
312 intr = g->ops.mc.intr_nonstall(g);
313 if (intr != 0U) {
314 nvgpu_info(g, "Pending nonstall intr1=0x%08x", intr);
315 }
316}
317
295void mc_gk20a_handle_intr_nonstall(struct gk20a *g, u32 ops) 318void mc_gk20a_handle_intr_nonstall(struct gk20a *g, u32 ops)
296{ 319{
297 bool semaphore_wakeup, post_events; 320 bool semaphore_wakeup, post_events;