diff options
Diffstat (limited to 'drivers/gpu/nvgpu/gk20a/hw_pri_ringstation_gpc_gk20a.h')
-rw-r--r-- | drivers/gpu/nvgpu/gk20a/hw_pri_ringstation_gpc_gk20a.h | 226 |
1 files changed, 0 insertions, 226 deletions
diff --git a/drivers/gpu/nvgpu/gk20a/hw_pri_ringstation_gpc_gk20a.h b/drivers/gpu/nvgpu/gk20a/hw_pri_ringstation_gpc_gk20a.h deleted file mode 100644 index e8aad933..00000000 --- a/drivers/gpu/nvgpu/gk20a/hw_pri_ringstation_gpc_gk20a.h +++ /dev/null | |||
@@ -1,226 +0,0 @@ | |||
1 | /* | ||
2 | * drivers/video/tegra/host/gk20a/hw_pri_ringstation_gpc_gk20a.h | ||
3 | * | ||
4 | * Copyright (c) 2012-2013, NVIDIA Corporation. All rights reserved. | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify it | ||
7 | * under the terms and conditions of the GNU General Public License, | ||
8 | * version 2, as published by the Free Software Foundation. | ||
9 | * | ||
10 | * This program is distributed in the hope it will be useful, but WITHOUT | ||
11 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | ||
12 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for | ||
13 | * more details. | ||
14 | * | ||
15 | * You should have received a copy of the GNU General Public License | ||
16 | * along with this program. If not, see <http://www.gnu.org/licenses/>. | ||
17 | * | ||
18 | */ | ||
19 | |||
20 | /* | ||
21 | * Function naming determines intended use: | ||
22 | * | ||
23 | * <x>_r(void) : Returns the offset for register <x>. | ||
24 | * | ||
25 | * <x>_w(void) : Returns the word offset for word (4 byte) element <x>. | ||
26 | * | ||
27 | * <x>_<y>_s(void) : Returns size of field <y> of register <x> in bits. | ||
28 | * | ||
29 | * <x>_<y>_f(u32 v) : Returns a value based on 'v' which has been shifted | ||
30 | * and masked to place it at field <y> of register <x>. This value | ||
31 | * can be |'d with others to produce a full register value for | ||
32 | * register <x>. | ||
33 | * | ||
34 | * <x>_<y>_m(void) : Returns a mask for field <y> of register <x>. This | ||
35 | * value can be ~'d and then &'d to clear the value of field <y> for | ||
36 | * register <x>. | ||
37 | * | ||
38 | * <x>_<y>_<z>_f(void) : Returns the constant value <z> after being shifted | ||
39 | * to place it at field <y> of register <x>. This value can be |'d | ||
40 | * with others to produce a full register value for <x>. | ||
41 | * | ||
42 | * <x>_<y>_v(u32 r) : Returns the value of field <y> from a full register | ||
43 | * <x> value 'r' after being shifted to place its LSB at bit 0. | ||
44 | * This value is suitable for direct comparison with other unshifted | ||
45 | * values appropriate for use in field <y> of register <x>. | ||
46 | * | ||
47 | * <x>_<y>_<z>_v(void) : Returns the constant value for <z> defined for | ||
48 | * field <y> of register <x>. This value is suitable for direct | ||
49 | * comparison with unshifted values appropriate for use in field <y> | ||
50 | * of register <x>. | ||
51 | */ | ||
52 | |||
53 | #ifndef __hw_pri_ringstation_gpc_gk20a_h__ | ||
54 | #define __hw_pri_ringstation_gpc_gk20a_h__ | ||
55 | /*This file is autogenerated. Do not edit. */ | ||
56 | |||
57 | static inline u32 pri_ringstation_gpc_master_config_r(u32 i) | ||
58 | { | ||
59 | return 0x00128300+((i)*4); | ||
60 | } | ||
61 | static inline u32 pri_ringstation_gpc_master_config__size_1_v(void) | ||
62 | { | ||
63 | return 64; | ||
64 | } | ||
65 | static inline u32 pri_ringstation_gpc_master_config_timeout_s(void) | ||
66 | { | ||
67 | return 18; | ||
68 | } | ||
69 | static inline u32 pri_ringstation_gpc_master_config_timeout_f(u32 v) | ||
70 | { | ||
71 | return (v & 0x3ffff) << 0; | ||
72 | } | ||
73 | static inline u32 pri_ringstation_gpc_master_config_timeout_m(void) | ||
74 | { | ||
75 | return 0x3ffff << 0; | ||
76 | } | ||
77 | static inline u32 pri_ringstation_gpc_master_config_timeout_v(u32 r) | ||
78 | { | ||
79 | return (r >> 0) & 0x3ffff; | ||
80 | } | ||
81 | static inline u32 pri_ringstation_gpc_master_config_timeout_i_v(void) | ||
82 | { | ||
83 | return 0x00000064; | ||
84 | } | ||
85 | static inline u32 pri_ringstation_gpc_master_config_timeout_i_f(void) | ||
86 | { | ||
87 | return 0x64; | ||
88 | } | ||
89 | static inline u32 pri_ringstation_gpc_master_config_fs_action_s(void) | ||
90 | { | ||
91 | return 1; | ||
92 | } | ||
93 | static inline u32 pri_ringstation_gpc_master_config_fs_action_f(u32 v) | ||
94 | { | ||
95 | return (v & 0x1) << 30; | ||
96 | } | ||
97 | static inline u32 pri_ringstation_gpc_master_config_fs_action_m(void) | ||
98 | { | ||
99 | return 0x1 << 30; | ||
100 | } | ||
101 | static inline u32 pri_ringstation_gpc_master_config_fs_action_v(u32 r) | ||
102 | { | ||
103 | return (r >> 30) & 0x1; | ||
104 | } | ||
105 | static inline u32 pri_ringstation_gpc_master_config_fs_action_error_v(void) | ||
106 | { | ||
107 | return 0x00000000; | ||
108 | } | ||
109 | static inline u32 pri_ringstation_gpc_master_config_fs_action_error_f(void) | ||
110 | { | ||
111 | return 0x0; | ||
112 | } | ||
113 | static inline u32 pri_ringstation_gpc_master_config_fs_action_soldier_on_v(void) | ||
114 | { | ||
115 | return 0x00000001; | ||
116 | } | ||
117 | static inline u32 pri_ringstation_gpc_master_config_fs_action_soldier_on_f(void) | ||
118 | { | ||
119 | return 0x40000000; | ||
120 | } | ||
121 | static inline u32 pri_ringstation_gpc_master_config_reset_action_s(void) | ||
122 | { | ||
123 | return 1; | ||
124 | } | ||
125 | static inline u32 pri_ringstation_gpc_master_config_reset_action_f(u32 v) | ||
126 | { | ||
127 | return (v & 0x1) << 31; | ||
128 | } | ||
129 | static inline u32 pri_ringstation_gpc_master_config_reset_action_m(void) | ||
130 | { | ||
131 | return 0x1 << 31; | ||
132 | } | ||
133 | static inline u32 pri_ringstation_gpc_master_config_reset_action_v(u32 r) | ||
134 | { | ||
135 | return (r >> 31) & 0x1; | ||
136 | } | ||
137 | static inline u32 pri_ringstation_gpc_master_config_reset_action_error_v(void) | ||
138 | { | ||
139 | return 0x00000000; | ||
140 | } | ||
141 | static inline u32 pri_ringstation_gpc_master_config_reset_action_error_f(void) | ||
142 | { | ||
143 | return 0x0; | ||
144 | } | ||
145 | static inline u32 pri_ringstation_gpc_master_config_reset_action_soldier_on_v(void) | ||
146 | { | ||
147 | return 0x00000001; | ||
148 | } | ||
149 | static inline u32 pri_ringstation_gpc_master_config_reset_action_soldier_on_f(void) | ||
150 | { | ||
151 | return 0x80000000; | ||
152 | } | ||
153 | static inline u32 pri_ringstation_gpc_master_config_setup_clocks_s(void) | ||
154 | { | ||
155 | return 3; | ||
156 | } | ||
157 | static inline u32 pri_ringstation_gpc_master_config_setup_clocks_f(u32 v) | ||
158 | { | ||
159 | return (v & 0x7) << 20; | ||
160 | } | ||
161 | static inline u32 pri_ringstation_gpc_master_config_setup_clocks_m(void) | ||
162 | { | ||
163 | return 0x7 << 20; | ||
164 | } | ||
165 | static inline u32 pri_ringstation_gpc_master_config_setup_clocks_v(u32 r) | ||
166 | { | ||
167 | return (r >> 20) & 0x7; | ||
168 | } | ||
169 | static inline u32 pri_ringstation_gpc_master_config_setup_clocks_i_v(void) | ||
170 | { | ||
171 | return 0x00000000; | ||
172 | } | ||
173 | static inline u32 pri_ringstation_gpc_master_config_setup_clocks_i_f(void) | ||
174 | { | ||
175 | return 0x0; | ||
176 | } | ||
177 | static inline u32 pri_ringstation_gpc_master_config_wait_clocks_s(void) | ||
178 | { | ||
179 | return 3; | ||
180 | } | ||
181 | static inline u32 pri_ringstation_gpc_master_config_wait_clocks_f(u32 v) | ||
182 | { | ||
183 | return (v & 0x7) << 24; | ||
184 | } | ||
185 | static inline u32 pri_ringstation_gpc_master_config_wait_clocks_m(void) | ||
186 | { | ||
187 | return 0x7 << 24; | ||
188 | } | ||
189 | static inline u32 pri_ringstation_gpc_master_config_wait_clocks_v(u32 r) | ||
190 | { | ||
191 | return (r >> 24) & 0x7; | ||
192 | } | ||
193 | static inline u32 pri_ringstation_gpc_master_config_wait_clocks_i_v(void) | ||
194 | { | ||
195 | return 0x00000000; | ||
196 | } | ||
197 | static inline u32 pri_ringstation_gpc_master_config_wait_clocks_i_f(void) | ||
198 | { | ||
199 | return 0x0; | ||
200 | } | ||
201 | static inline u32 pri_ringstation_gpc_master_config_hold_clocks_s(void) | ||
202 | { | ||
203 | return 3; | ||
204 | } | ||
205 | static inline u32 pri_ringstation_gpc_master_config_hold_clocks_f(u32 v) | ||
206 | { | ||
207 | return (v & 0x7) << 27; | ||
208 | } | ||
209 | static inline u32 pri_ringstation_gpc_master_config_hold_clocks_m(void) | ||
210 | { | ||
211 | return 0x7 << 27; | ||
212 | } | ||
213 | static inline u32 pri_ringstation_gpc_master_config_hold_clocks_v(u32 r) | ||
214 | { | ||
215 | return (r >> 27) & 0x7; | ||
216 | } | ||
217 | static inline u32 pri_ringstation_gpc_master_config_hold_clocks_i_v(void) | ||
218 | { | ||
219 | return 0x00000000; | ||
220 | } | ||
221 | static inline u32 pri_ringstation_gpc_master_config_hold_clocks_i_f(void) | ||
222 | { | ||
223 | return 0x0; | ||
224 | } | ||
225 | |||
226 | #endif /* __hw_pri_ringstation_gpc_gk20a_h__ */ | ||