diff options
Diffstat (limited to 'drivers/gpu/nvgpu/gk20a/hw_gr_gk20a.h')
-rw-r--r-- | drivers/gpu/nvgpu/gk20a/hw_gr_gk20a.h | 20 |
1 files changed, 20 insertions, 0 deletions
diff --git a/drivers/gpu/nvgpu/gk20a/hw_gr_gk20a.h b/drivers/gpu/nvgpu/gk20a/hw_gr_gk20a.h index abe6b119..726d0ad3 100644 --- a/drivers/gpu/nvgpu/gk20a/hw_gr_gk20a.h +++ b/drivers/gpu/nvgpu/gk20a/hw_gr_gk20a.h | |||
@@ -3038,6 +3038,10 @@ static inline u32 gr_gpc0_tpc0_sm_dbgr_control0_r(void) | |||
3038 | { | 3038 | { |
3039 | return 0x00504610; | 3039 | return 0x00504610; |
3040 | } | 3040 | } |
3041 | static inline u32 gr_gpc0_tpc0_sm_dbgr_control0_debugger_mode_m(void) | ||
3042 | { | ||
3043 | return 0x1 << 0; | ||
3044 | } | ||
3041 | static inline u32 gr_gpc0_tpc0_sm_dbgr_control0_debugger_mode_v(u32 r) | 3045 | static inline u32 gr_gpc0_tpc0_sm_dbgr_control0_debugger_mode_v(u32 r) |
3042 | { | 3046 | { |
3043 | return (r >> 0) & 0x1; | 3047 | return (r >> 0) & 0x1; |
@@ -3046,10 +3050,18 @@ static inline u32 gr_gpc0_tpc0_sm_dbgr_control0_debugger_mode_on_v(void) | |||
3046 | { | 3050 | { |
3047 | return 0x00000001; | 3051 | return 0x00000001; |
3048 | } | 3052 | } |
3053 | static inline u32 gr_gpc0_tpc0_sm_dbgr_control0_debugger_mode_on_f(void) | ||
3054 | { | ||
3055 | return 0x1; | ||
3056 | } | ||
3049 | static inline u32 gr_gpc0_tpc0_sm_dbgr_control0_debugger_mode_off_v(void) | 3057 | static inline u32 gr_gpc0_tpc0_sm_dbgr_control0_debugger_mode_off_v(void) |
3050 | { | 3058 | { |
3051 | return 0x00000000; | 3059 | return 0x00000000; |
3052 | } | 3060 | } |
3061 | static inline u32 gr_gpc0_tpc0_sm_dbgr_control0_debugger_mode_off_f(void) | ||
3062 | { | ||
3063 | return 0x0; | ||
3064 | } | ||
3053 | static inline u32 gr_gpc0_tpc0_sm_dbgr_control0_stop_trigger_enable_f(void) | 3065 | static inline u32 gr_gpc0_tpc0_sm_dbgr_control0_stop_trigger_enable_f(void) |
3054 | { | 3066 | { |
3055 | return 0x80000000; | 3067 | return 0x80000000; |
@@ -3062,6 +3074,10 @@ static inline u32 gr_gpc0_tpc0_sm_dbgr_control0_run_trigger_task_f(void) | |||
3062 | { | 3074 | { |
3063 | return 0x40000000; | 3075 | return 0x40000000; |
3064 | } | 3076 | } |
3077 | static inline u32 gr_gpc0_tpc0_sm_dbgr_control0_stop_on_any_warp_m(void) | ||
3078 | { | ||
3079 | return 0x1 << 1; | ||
3080 | } | ||
3065 | static inline u32 gr_gpc0_tpc0_sm_dbgr_control0_stop_on_any_warp_v(u32 r) | 3081 | static inline u32 gr_gpc0_tpc0_sm_dbgr_control0_stop_on_any_warp_v(u32 r) |
3066 | { | 3082 | { |
3067 | return (r >> 1) & 0x1; | 3083 | return (r >> 1) & 0x1; |
@@ -3070,6 +3086,10 @@ static inline u32 gr_gpc0_tpc0_sm_dbgr_control0_stop_on_any_warp_disable_f(void) | |||
3070 | { | 3086 | { |
3071 | return 0x0; | 3087 | return 0x0; |
3072 | } | 3088 | } |
3089 | static inline u32 gr_gpc0_tpc0_sm_dbgr_control0_stop_on_any_sm_m(void) | ||
3090 | { | ||
3091 | return 0x1 << 2; | ||
3092 | } | ||
3073 | static inline u32 gr_gpc0_tpc0_sm_dbgr_control0_stop_on_any_sm_v(u32 r) | 3093 | static inline u32 gr_gpc0_tpc0_sm_dbgr_control0_stop_on_any_sm_v(u32 r) |
3074 | { | 3094 | { |
3075 | return (r >> 2) & 0x1; | 3095 | return (r >> 2) & 0x1; |