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Diffstat (limited to 'drivers/gpu/nvgpu/gk20a/gr_gk20a.h')
-rw-r--r--drivers/gpu/nvgpu/gk20a/gr_gk20a.h9
1 files changed, 0 insertions, 9 deletions
diff --git a/drivers/gpu/nvgpu/gk20a/gr_gk20a.h b/drivers/gpu/nvgpu/gk20a/gr_gk20a.h
index 3fc7e55f..bd5e625d 100644
--- a/drivers/gpu/nvgpu/gk20a/gr_gk20a.h
+++ b/drivers/gpu/nvgpu/gk20a/gr_gk20a.h
@@ -254,14 +254,6 @@ struct nvgpu_preemption_modes_rec {
254 u32 default_compute_preempt_mode; /* default mode */ 254 u32 default_compute_preempt_mode; /* default mode */
255}; 255};
256 256
257struct nvgpu_gr_sm_error_state {
258 u32 hww_global_esr;
259 u32 hww_warp_esr;
260 u64 hww_warp_esr_pc;
261 u32 hww_global_esr_report_mask;
262 u32 hww_warp_esr_report_mask;
263};
264
265struct gr_gk20a { 257struct gr_gk20a {
266 struct gk20a *g; 258 struct gk20a *g;
267 struct { 259 struct {
@@ -427,7 +419,6 @@ struct gr_gk20a {
427 u32 *fbp_rop_l2_en_mask; 419 u32 *fbp_rop_l2_en_mask;
428 u32 no_of_sm; 420 u32 no_of_sm;
429 struct sm_info *sm_to_cluster; 421 struct sm_info *sm_to_cluster;
430 struct nvgpu_gr_sm_error_state *sm_error_states;
431 422
432#define NVGPU_SM_EXCEPTION_TYPE_MASK_NONE (0x0U) 423#define NVGPU_SM_EXCEPTION_TYPE_MASK_NONE (0x0U)
433#define NVGPU_SM_EXCEPTION_TYPE_MASK_FATAL (0x1U << 0) 424#define NVGPU_SM_EXCEPTION_TYPE_MASK_FATAL (0x1U << 0)