diff options
Diffstat (limited to 'drivers/gpu/nvgpu/gk20a/gr_gk20a.h')
-rw-r--r-- | drivers/gpu/nvgpu/gk20a/gr_gk20a.h | 17 |
1 files changed, 15 insertions, 2 deletions
diff --git a/drivers/gpu/nvgpu/gk20a/gr_gk20a.h b/drivers/gpu/nvgpu/gk20a/gr_gk20a.h index 33176df7..40b3bd44 100644 --- a/drivers/gpu/nvgpu/gk20a/gr_gk20a.h +++ b/drivers/gpu/nvgpu/gk20a/gr_gk20a.h | |||
@@ -1,7 +1,7 @@ | |||
1 | /* | 1 | /* |
2 | * GK20A Graphics Engine | 2 | * GK20A Graphics Engine |
3 | * | 3 | * |
4 | * Copyright (c) 2011-2016, NVIDIA CORPORATION. All rights reserved. | 4 | * Copyright (c) 2011-2017, NVIDIA CORPORATION. All rights reserved. |
5 | * | 5 | * |
6 | * This program is free software; you can redistribute it and/or modify it | 6 | * This program is free software; you can redistribute it and/or modify it |
7 | * under the terms and conditions of the GNU General Public License, | 7 | * under the terms and conditions of the GNU General Public License, |
@@ -22,6 +22,10 @@ | |||
22 | #ifdef CONFIG_ARCH_TEGRA_18x_SOC | 22 | #ifdef CONFIG_ARCH_TEGRA_18x_SOC |
23 | #include "gr_t18x.h" | 23 | #include "gr_t18x.h" |
24 | #endif | 24 | #endif |
25 | #ifdef CONFIG_TEGRA_19x_GPU | ||
26 | #include "gr_t19x.h" | ||
27 | #endif | ||
28 | |||
25 | 29 | ||
26 | #include "tsg_gk20a.h" | 30 | #include "tsg_gk20a.h" |
27 | #include "gr_ctx_gk20a.h" | 31 | #include "gr_ctx_gk20a.h" |
@@ -141,6 +145,7 @@ struct gr_zcull_info { | |||
141 | #define GK20A_ZBC_TYPE_INVALID 0 | 145 | #define GK20A_ZBC_TYPE_INVALID 0 |
142 | #define GK20A_ZBC_TYPE_COLOR 1 | 146 | #define GK20A_ZBC_TYPE_COLOR 1 |
143 | #define GK20A_ZBC_TYPE_DEPTH 2 | 147 | #define GK20A_ZBC_TYPE_DEPTH 2 |
148 | #define T19X_ZBC 3 | ||
144 | 149 | ||
145 | struct zbc_color_table { | 150 | struct zbc_color_table { |
146 | u32 color_ds[GK20A_ZBC_COLOR_VALUE_SIZE]; | 151 | u32 color_ds[GK20A_ZBC_COLOR_VALUE_SIZE]; |
@@ -330,12 +335,20 @@ struct gr_gk20a { | |||
330 | struct mutex zbc_lock; | 335 | struct mutex zbc_lock; |
331 | struct zbc_color_table zbc_col_tbl[GK20A_ZBC_TABLE_SIZE]; | 336 | struct zbc_color_table zbc_col_tbl[GK20A_ZBC_TABLE_SIZE]; |
332 | struct zbc_depth_table zbc_dep_tbl[GK20A_ZBC_TABLE_SIZE]; | 337 | struct zbc_depth_table zbc_dep_tbl[GK20A_ZBC_TABLE_SIZE]; |
333 | 338 | #ifdef CONFIG_TEGRA_19x_GPU | |
339 | struct zbc_s_table zbc_s_tbl[GK20A_ZBC_TABLE_SIZE]; | ||
340 | #endif | ||
334 | s32 max_default_color_index; | 341 | s32 max_default_color_index; |
335 | s32 max_default_depth_index; | 342 | s32 max_default_depth_index; |
343 | #ifdef CONFIG_TEGRA_19x_GPU | ||
344 | s32 max_default_s_index; | ||
345 | #endif | ||
336 | 346 | ||
337 | u32 max_used_color_index; | 347 | u32 max_used_color_index; |
338 | u32 max_used_depth_index; | 348 | u32 max_used_depth_index; |
349 | #ifdef CONFIG_TEGRA_19x_GPU | ||
350 | u32 max_used_s_index; | ||
351 | #endif | ||
339 | 352 | ||
340 | #define GR_CHANNEL_MAP_TLB_SIZE 2 /* must of power of 2 */ | 353 | #define GR_CHANNEL_MAP_TLB_SIZE 2 /* must of power of 2 */ |
341 | struct gr_channel_map_tlb_entry chid_tlb[GR_CHANNEL_MAP_TLB_SIZE]; | 354 | struct gr_channel_map_tlb_entry chid_tlb[GR_CHANNEL_MAP_TLB_SIZE]; |