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Diffstat (limited to 'drivers/gpu/nvgpu/gk20a/gr_gk20a.h')
-rw-r--r--drivers/gpu/nvgpu/gk20a/gr_gk20a.h12
1 files changed, 6 insertions, 6 deletions
diff --git a/drivers/gpu/nvgpu/gk20a/gr_gk20a.h b/drivers/gpu/nvgpu/gk20a/gr_gk20a.h
index 5a987a82..2dd1eaf5 100644
--- a/drivers/gpu/nvgpu/gk20a/gr_gk20a.h
+++ b/drivers/gpu/nvgpu/gk20a/gr_gk20a.h
@@ -275,8 +275,8 @@ struct gr_gk20a {
275 bool valid; 275 bool valid;
276 } ctx_vars; 276 } ctx_vars;
277 277
278 struct mutex ctx_mutex; /* protect golden ctx init */ 278 struct nvgpu_mutex ctx_mutex; /* protect golden ctx init */
279 struct mutex fecs_mutex; /* protect fecs method */ 279 struct nvgpu_mutex fecs_mutex; /* protect fecs method */
280 280
281#define GR_NETLIST_DYNAMIC -1 281#define GR_NETLIST_DYNAMIC -1
282#define GR_NETLIST_STATIC_A 'A' 282#define GR_NETLIST_STATIC_A 'A'
@@ -333,7 +333,7 @@ struct gr_gk20a {
333 u32 max_comptag_mem; /* max memory size (MB) for comptag */ 333 u32 max_comptag_mem; /* max memory size (MB) for comptag */
334 struct compbit_store_desc compbit_store; 334 struct compbit_store_desc compbit_store;
335 struct gk20a_comptag_allocator { 335 struct gk20a_comptag_allocator {
336 struct mutex lock; 336 struct nvgpu_mutex lock;
337 /* this bitmap starts at ctag 1. 0th cannot be taken */ 337 /* this bitmap starts at ctag 1. 0th cannot be taken */
338 unsigned long *bitmap; 338 unsigned long *bitmap;
339 /* size of bitmap, not max ctags, so one less */ 339 /* size of bitmap, not max ctags, so one less */
@@ -342,7 +342,7 @@ struct gr_gk20a {
342 342
343 struct gr_zcull_gk20a zcull; 343 struct gr_zcull_gk20a zcull;
344 344
345 struct mutex zbc_lock; 345 struct nvgpu_mutex zbc_lock;
346 struct zbc_color_table zbc_col_tbl[GK20A_ZBC_TABLE_SIZE]; 346 struct zbc_color_table zbc_col_tbl[GK20A_ZBC_TABLE_SIZE];
347 struct zbc_depth_table zbc_dep_tbl[GK20A_ZBC_TABLE_SIZE]; 347 struct zbc_depth_table zbc_dep_tbl[GK20A_ZBC_TABLE_SIZE];
348#ifdef CONFIG_TEGRA_19x_GPU 348#ifdef CONFIG_TEGRA_19x_GPU
@@ -363,7 +363,7 @@ struct gr_gk20a {
363#define GR_CHANNEL_MAP_TLB_SIZE 2 /* must of power of 2 */ 363#define GR_CHANNEL_MAP_TLB_SIZE 2 /* must of power of 2 */
364 struct gr_channel_map_tlb_entry chid_tlb[GR_CHANNEL_MAP_TLB_SIZE]; 364 struct gr_channel_map_tlb_entry chid_tlb[GR_CHANNEL_MAP_TLB_SIZE];
365 u32 channel_tlb_flush_index; 365 u32 channel_tlb_flush_index;
366 spinlock_t ch_tlb_lock; 366 struct nvgpu_spinlock ch_tlb_lock;
367 367
368 void (*remove_support)(struct gr_gk20a *gr); 368 void (*remove_support)(struct gr_gk20a *gr);
369 bool sw_ready; 369 bool sw_ready;
@@ -379,7 +379,7 @@ struct gr_gk20a {
379 struct sm_info *sm_to_cluster; 379 struct sm_info *sm_to_cluster;
380 struct nvgpu_dbg_gpu_sm_error_state_record *sm_error_states; 380 struct nvgpu_dbg_gpu_sm_error_state_record *sm_error_states;
381#if defined(CONFIG_GK20A_CYCLE_STATS) 381#if defined(CONFIG_GK20A_CYCLE_STATS)
382 struct mutex cs_lock; 382 struct nvgpu_mutex cs_lock;
383 struct gk20a_cs_snapshot *cs_data; 383 struct gk20a_cs_snapshot *cs_data;
384#endif 384#endif
385}; 385};