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Diffstat (limited to 'drivers/gpu/nvgpu/gk20a/gr_gk20a.h')
-rw-r--r--drivers/gpu/nvgpu/gk20a/gr_gk20a.h18
1 files changed, 9 insertions, 9 deletions
diff --git a/drivers/gpu/nvgpu/gk20a/gr_gk20a.h b/drivers/gpu/nvgpu/gk20a/gr_gk20a.h
index f60afd58..e9bf4505 100644
--- a/drivers/gpu/nvgpu/gk20a/gr_gk20a.h
+++ b/drivers/gpu/nvgpu/gk20a/gr_gk20a.h
@@ -15,8 +15,8 @@
15 * You should have received a copy of the GNU General Public License 15 * You should have received a copy of the GNU General Public License
16 * along with this program. If not, see <http://www.gnu.org/licenses/>. 16 * along with this program. If not, see <http://www.gnu.org/licenses/>.
17 */ 17 */
18#ifndef __GR_GK20A_H__ 18#ifndef GR_GK20A_H
19#define __GR_GK20A_H__ 19#define GR_GK20A_H
20 20
21#include <linux/slab.h> 21#include <linux/slab.h>
22 22
@@ -330,13 +330,13 @@ int gk20a_init_gr_channel(struct channel_gk20a *ch_gk20a);
330 330
331int gr_gk20a_init_ctx_vars(struct gk20a *g, struct gr_gk20a *gr); 331int gr_gk20a_init_ctx_vars(struct gk20a *g, struct gr_gk20a *gr);
332 332
333struct nvhost_alloc_obj_ctx_args; 333struct nvgpu_alloc_obj_ctx_args;
334struct nvhost_free_obj_ctx_args; 334struct nvgpu_free_obj_ctx_args;
335 335
336int gk20a_alloc_obj_ctx(struct channel_gk20a *c, 336int gk20a_alloc_obj_ctx(struct channel_gk20a *c,
337 struct nvhost_alloc_obj_ctx_args *args); 337 struct nvgpu_alloc_obj_ctx_args *args);
338int gk20a_free_obj_ctx(struct channel_gk20a *c, 338int gk20a_free_obj_ctx(struct channel_gk20a *c,
339 struct nvhost_free_obj_ctx_args *args); 339 struct nvgpu_free_obj_ctx_args *args);
340void gk20a_free_channel_ctx(struct channel_gk20a *c); 340void gk20a_free_channel_ctx(struct channel_gk20a *c);
341 341
342int gk20a_gr_isr(struct gk20a *g); 342int gk20a_gr_isr(struct gk20a *g);
@@ -384,9 +384,9 @@ bool gk20a_gr_sm_debugger_attached(struct gk20a *g);
384 384
385int gk20a_gr_suspend(struct gk20a *g); 385int gk20a_gr_suspend(struct gk20a *g);
386 386
387struct nvhost_dbg_gpu_reg_op; 387struct nvgpu_dbg_gpu_reg_op;
388int gr_gk20a_exec_ctx_ops(struct channel_gk20a *ch, 388int gr_gk20a_exec_ctx_ops(struct channel_gk20a *ch,
389 struct nvhost_dbg_gpu_reg_op *ctx_ops, u32 num_ops, 389 struct nvgpu_dbg_gpu_reg_op *ctx_ops, u32 num_ops,
390 u32 num_ctx_wr_ops, u32 num_ctx_rd_ops); 390 u32 num_ctx_wr_ops, u32 num_ctx_rd_ops);
391int gr_gk20a_get_ctx_buffer_offsets(struct gk20a *g, 391int gr_gk20a_get_ctx_buffer_offsets(struct gk20a *g,
392 u32 addr, 392 u32 addr,
@@ -424,4 +424,4 @@ int gr_gk20a_load_ctxsw_ucode(struct gk20a *g);
424void gr_gk20a_load_falcon_bind_instblk(struct gk20a *g); 424void gr_gk20a_load_falcon_bind_instblk(struct gk20a *g);
425 425
426void gr_gk20a_free_tsg_gr_ctx(struct tsg_gk20a *c); 426void gr_gk20a_free_tsg_gr_ctx(struct tsg_gk20a *c);
427#endif /*__GR_GK20A_H__*/ 427#endif /* GR_GK20A_H */