summaryrefslogtreecommitdiffstats
path: root/drivers/gpu/nvgpu/gk20a/gr_gk20a.h
diff options
context:
space:
mode:
Diffstat (limited to 'drivers/gpu/nvgpu/gk20a/gr_gk20a.h')
-rw-r--r--drivers/gpu/nvgpu/gk20a/gr_gk20a.h9
1 files changed, 8 insertions, 1 deletions
diff --git a/drivers/gpu/nvgpu/gk20a/gr_gk20a.h b/drivers/gpu/nvgpu/gk20a/gr_gk20a.h
index 0a685d01..db1a9514 100644
--- a/drivers/gpu/nvgpu/gk20a/gr_gk20a.h
+++ b/drivers/gpu/nvgpu/gk20a/gr_gk20a.h
@@ -52,8 +52,14 @@
52 52
53#define GK20A_TIMEOUT_FPGA 100000 /* 100 sec */ 53#define GK20A_TIMEOUT_FPGA 100000 /* 100 sec */
54 54
55#define PATCH_CTX_SLOTS_MAX 128 55/*
56 * allocate a minimum of 1 page (4KB) worth of patch space, this is 512 entries
57 * of address and data pairs
58 */
56#define PATCH_CTX_SLOTS_REQUIRED_PER_ENTRY 2 59#define PATCH_CTX_SLOTS_REQUIRED_PER_ENTRY 2
60#define PATCH_CTX_SLOTS_PER_PAGE \
61 (PAGE_SIZE/(PATCH_CTX_SLOTS_REQUIRED_PER_ENTRY * sizeof(u32)))
62#define PATCH_CTX_ENTRIES_FROM_SIZE(size) (size/sizeof(u32))
57 63
58struct channel_gk20a; 64struct channel_gk20a;
59struct nvgpu_warpstate; 65struct nvgpu_warpstate;
@@ -756,5 +762,6 @@ void gk20a_gr_get_ovr_perf_regs(struct gk20a *g, u32 *num_ovr_perf_regs,
756 u32 **ovr_perf_regs); 762 u32 **ovr_perf_regs);
757void gk20a_gr_init_ctxsw_hdr_data(struct gk20a *g, 763void gk20a_gr_init_ctxsw_hdr_data(struct gk20a *g,
758 struct nvgpu_mem *mem); 764 struct nvgpu_mem *mem);
765u32 gr_gk20a_get_patch_slots(struct gk20a *g);
759 766
760#endif /*__GR_GK20A_H__*/ 767#endif /*__GR_GK20A_H__*/