diff options
Diffstat (limited to 'drivers/gpu/nvgpu/gk20a/gr_gk20a.c')
-rw-r--r-- | drivers/gpu/nvgpu/gk20a/gr_gk20a.c | 20 |
1 files changed, 11 insertions, 9 deletions
diff --git a/drivers/gpu/nvgpu/gk20a/gr_gk20a.c b/drivers/gpu/nvgpu/gk20a/gr_gk20a.c index e6103479..ee8b3b63 100644 --- a/drivers/gpu/nvgpu/gk20a/gr_gk20a.c +++ b/drivers/gpu/nvgpu/gk20a/gr_gk20a.c | |||
@@ -124,7 +124,7 @@ int gr_gk20a_get_ctx_id(struct gk20a *g, | |||
124 | 124 | ||
125 | void gk20a_fecs_dump_falcon_stats(struct gk20a *g) | 125 | void gk20a_fecs_dump_falcon_stats(struct gk20a *g) |
126 | { | 126 | { |
127 | int i; | 127 | unsigned int i; |
128 | 128 | ||
129 | gk20a_err(dev_from_gk20a(g), "gr_fecs_os_r : %d", | 129 | gk20a_err(dev_from_gk20a(g), "gr_fecs_os_r : %d", |
130 | gk20a_readl(g, gr_fecs_os_r())); | 130 | gk20a_readl(g, gr_fecs_os_r())); |
@@ -1395,9 +1395,9 @@ int gr_gk20a_init_fs_state(struct gk20a *g) | |||
1395 | 1395 | ||
1396 | fuse_tpc_mask = g->ops.gr.get_gpc_tpc_mask(g, 0); | 1396 | fuse_tpc_mask = g->ops.gr.get_gpc_tpc_mask(g, 0); |
1397 | if (g->tpc_fs_mask_user && | 1397 | if (g->tpc_fs_mask_user && |
1398 | fuse_tpc_mask == (0x1 << gr->max_tpc_count) - 1) { | 1398 | fuse_tpc_mask == (0x1U << gr->max_tpc_count) - 1U) { |
1399 | u32 val = g->tpc_fs_mask_user; | 1399 | u32 val = g->tpc_fs_mask_user; |
1400 | val &= (0x1 << gr->max_tpc_count) - 1; | 1400 | val &= (0x1U << gr->max_tpc_count) - 1U; |
1401 | gk20a_writel(g, gr_cwd_fs_r(), | 1401 | gk20a_writel(g, gr_cwd_fs_r(), |
1402 | gr_cwd_fs_num_gpcs_f(gr->gpc_count) | | 1402 | gr_cwd_fs_num_gpcs_f(gr->gpc_count) | |
1403 | gr_cwd_fs_num_tpcs_f(hweight32(val))); | 1403 | gr_cwd_fs_num_tpcs_f(hweight32(val))); |
@@ -1444,7 +1444,7 @@ static u32 gk20a_init_sw_bundle(struct gk20a *g) | |||
1444 | struct av_list_gk20a *sw_bundle_init = &g->gr.ctx_vars.sw_bundle_init; | 1444 | struct av_list_gk20a *sw_bundle_init = &g->gr.ctx_vars.sw_bundle_init; |
1445 | u32 last_bundle_data = 0; | 1445 | u32 last_bundle_data = 0; |
1446 | u32 err = 0; | 1446 | u32 err = 0; |
1447 | int i; | 1447 | unsigned int i; |
1448 | unsigned long end_jiffies = jiffies + | 1448 | unsigned long end_jiffies = jiffies + |
1449 | msecs_to_jiffies(gk20a_get_gr_idle_timeout(g)); | 1449 | msecs_to_jiffies(gk20a_get_gr_idle_timeout(g)); |
1450 | 1450 | ||
@@ -2110,7 +2110,7 @@ static int gr_gk20a_copy_ctxsw_ucode_segments( | |||
2110 | u32 *bootimage, | 2110 | u32 *bootimage, |
2111 | u32 *code, u32 *data) | 2111 | u32 *code, u32 *data) |
2112 | { | 2112 | { |
2113 | int i; | 2113 | unsigned int i; |
2114 | 2114 | ||
2115 | gk20a_mem_wr_n(g, dst, segments->boot.offset, bootimage, | 2115 | gk20a_mem_wr_n(g, dst, segments->boot.offset, bootimage, |
2116 | segments->boot.size); | 2116 | segments->boot.size); |
@@ -4048,7 +4048,8 @@ int gr_gk20a_query_zbc(struct gk20a *g, struct gr_gk20a *gr, | |||
4048 | 4048 | ||
4049 | static int gr_gk20a_load_zbc_table(struct gk20a *g, struct gr_gk20a *gr) | 4049 | static int gr_gk20a_load_zbc_table(struct gk20a *g, struct gr_gk20a *gr) |
4050 | { | 4050 | { |
4051 | int i, ret; | 4051 | unsigned int i; |
4052 | int ret; | ||
4052 | 4053 | ||
4053 | for (i = 0; i < gr->max_used_color_index; i++) { | 4054 | for (i = 0; i < gr->max_used_color_index; i++) { |
4054 | struct zbc_color_table *c_tbl = &gr->zbc_col_tbl[i]; | 4055 | struct zbc_color_table *c_tbl = &gr->zbc_col_tbl[i]; |
@@ -4898,7 +4899,7 @@ static int gr_gk20a_init_access_map(struct gk20a *g) | |||
4898 | DIV_ROUND_UP(gr->ctx_vars.priv_access_map_size, | 4899 | DIV_ROUND_UP(gr->ctx_vars.priv_access_map_size, |
4899 | PAGE_SIZE); | 4900 | PAGE_SIZE); |
4900 | u32 *whitelist = NULL; | 4901 | u32 *whitelist = NULL; |
4901 | int num_entries = 0; | 4902 | unsigned int num_entries = 0; |
4902 | 4903 | ||
4903 | if (gk20a_mem_begin(g, mem)) { | 4904 | if (gk20a_mem_begin(g, mem)) { |
4904 | gk20a_err(dev_from_gk20a(g), | 4905 | gk20a_err(dev_from_gk20a(g), |
@@ -6996,7 +6997,7 @@ static void gr_gk20a_access_smpc_reg(struct gk20a *g, u32 quad, u32 offset) | |||
6996 | gk20a_writel(g, gpc_tpc_addr, reg); | 6997 | gk20a_writel(g, gpc_tpc_addr, reg); |
6997 | } | 6998 | } |
6998 | 6999 | ||
6999 | #define ILLEGAL_ID (~0) | 7000 | #define ILLEGAL_ID ((u32)~0) |
7000 | 7001 | ||
7001 | static inline bool check_main_image_header_magic(u8 *context) | 7002 | static inline bool check_main_image_header_magic(u8 *context) |
7002 | { | 7003 | { |
@@ -8762,7 +8763,8 @@ int gr_gk20a_set_sm_debug_mode(struct gk20a *g, | |||
8762 | struct channel_gk20a *ch, u64 sms, bool enable) | 8763 | struct channel_gk20a *ch, u64 sms, bool enable) |
8763 | { | 8764 | { |
8764 | struct nvgpu_dbg_gpu_reg_op *ops; | 8765 | struct nvgpu_dbg_gpu_reg_op *ops; |
8765 | int i = 0, sm_id, err; | 8766 | unsigned int i = 0, sm_id; |
8767 | int err; | ||
8766 | u32 gpc_stride = nvgpu_get_litter_value(g, GPU_LIT_GPC_STRIDE); | 8768 | u32 gpc_stride = nvgpu_get_litter_value(g, GPU_LIT_GPC_STRIDE); |
8767 | u32 tpc_in_gpc_stride = nvgpu_get_litter_value(g, GPU_LIT_TPC_IN_GPC_STRIDE); | 8769 | u32 tpc_in_gpc_stride = nvgpu_get_litter_value(g, GPU_LIT_TPC_IN_GPC_STRIDE); |
8768 | 8770 | ||