diff options
Diffstat (limited to 'drivers/gpu/nvgpu/gk20a/gr_gk20a.c')
-rw-r--r-- | drivers/gpu/nvgpu/gk20a/gr_gk20a.c | 10 |
1 files changed, 10 insertions, 0 deletions
diff --git a/drivers/gpu/nvgpu/gk20a/gr_gk20a.c b/drivers/gpu/nvgpu/gk20a/gr_gk20a.c index 6e3ea00a..152d3f5e 100644 --- a/drivers/gpu/nvgpu/gk20a/gr_gk20a.c +++ b/drivers/gpu/nvgpu/gk20a/gr_gk20a.c | |||
@@ -5182,6 +5182,11 @@ void gk20a_gr_clear_sm_hww(struct gk20a *g, | |||
5182 | gr_gpc0_tpc0_sm_hww_warp_esr_error_none_f()); | 5182 | gr_gpc0_tpc0_sm_hww_warp_esr_error_none_f()); |
5183 | } | 5183 | } |
5184 | 5184 | ||
5185 | u32 gk20a_mask_hww_warp_esr(u32 hww_warp_esr) | ||
5186 | { | ||
5187 | return hww_warp_esr; | ||
5188 | } | ||
5189 | |||
5185 | static int gk20a_gr_handle_sm_exception(struct gk20a *g, u32 gpc, u32 tpc, | 5190 | static int gk20a_gr_handle_sm_exception(struct gk20a *g, u32 gpc, u32 tpc, |
5186 | bool *post_event, struct channel_gk20a *fault_ch) | 5191 | bool *post_event, struct channel_gk20a *fault_ch) |
5187 | { | 5192 | { |
@@ -5206,6 +5211,7 @@ static int gk20a_gr_handle_sm_exception(struct gk20a *g, u32 gpc, u32 tpc, | |||
5206 | global_esr = gk20a_readl(g, | 5211 | global_esr = gk20a_readl(g, |
5207 | gr_gpc0_tpc0_sm_hww_global_esr_r() + offset); | 5212 | gr_gpc0_tpc0_sm_hww_global_esr_r() + offset); |
5208 | warp_esr = gk20a_readl(g, gr_gpc0_tpc0_sm_hww_warp_esr_r() + offset); | 5213 | warp_esr = gk20a_readl(g, gr_gpc0_tpc0_sm_hww_warp_esr_r() + offset); |
5214 | warp_esr = g->ops.gr.mask_hww_warp_esr(warp_esr); | ||
5209 | 5215 | ||
5210 | if (g->ops.gr.pre_process_sm_exception) { | 5216 | if (g->ops.gr.pre_process_sm_exception) { |
5211 | ret = g->ops.gr.pre_process_sm_exception(g, gpc, tpc, | 5217 | ret = g->ops.gr.pre_process_sm_exception(g, gpc, tpc, |
@@ -7009,6 +7015,9 @@ int gk20a_gr_wait_for_sm_lock_down(struct gk20a *g, u32 gpc, u32 tpc, | |||
7009 | gr_gpc0_tpc0_sm_hww_warp_esr_r() + offset); | 7015 | gr_gpc0_tpc0_sm_hww_warp_esr_r() + offset); |
7010 | u32 dbgr_status0 = gk20a_readl(g, | 7016 | u32 dbgr_status0 = gk20a_readl(g, |
7011 | gr_gpc0_tpc0_sm_dbgr_status0_r() + offset); | 7017 | gr_gpc0_tpc0_sm_dbgr_status0_r() + offset); |
7018 | |||
7019 | warp_esr = g->ops.gr.mask_hww_warp_esr(warp_esr); | ||
7020 | |||
7012 | locked_down = | 7021 | locked_down = |
7013 | (gr_gpc0_tpc0_sm_dbgr_status0_locked_down_v(dbgr_status0) == | 7022 | (gr_gpc0_tpc0_sm_dbgr_status0_locked_down_v(dbgr_status0) == |
7014 | gr_gpc0_tpc0_sm_dbgr_status0_locked_down_true_v()); | 7023 | gr_gpc0_tpc0_sm_dbgr_status0_locked_down_true_v()); |
@@ -7531,4 +7540,5 @@ void gk20a_init_gr_ops(struct gpu_ops *gops) | |||
7531 | gops->gr.bpt_reg_info = gr_gk20a_bpt_reg_info; | 7540 | gops->gr.bpt_reg_info = gr_gk20a_bpt_reg_info; |
7532 | gops->gr.get_access_map = gr_gk20a_get_access_map; | 7541 | gops->gr.get_access_map = gr_gk20a_get_access_map; |
7533 | gops->gr.handle_fecs_error = gk20a_gr_handle_fecs_error; | 7542 | gops->gr.handle_fecs_error = gk20a_gr_handle_fecs_error; |
7543 | gops->gr.mask_hww_warp_esr = gk20a_mask_hww_warp_esr; | ||
7534 | } | 7544 | } |