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Diffstat (limited to 'drivers/gpu/nvgpu/gk20a/gr_gk20a.c')
-rw-r--r--drivers/gpu/nvgpu/gk20a/gr_gk20a.c8
1 files changed, 4 insertions, 4 deletions
diff --git a/drivers/gpu/nvgpu/gk20a/gr_gk20a.c b/drivers/gpu/nvgpu/gk20a/gr_gk20a.c
index 3115b5c3..ab3f18ba 100644
--- a/drivers/gpu/nvgpu/gk20a/gr_gk20a.c
+++ b/drivers/gpu/nvgpu/gk20a/gr_gk20a.c
@@ -1502,7 +1502,7 @@ static int gr_gk20a_init_golden_ctx_image(struct gk20a *g,
1502 ctx_header_words = roundup(ctx_header_bytes, sizeof(u32)); 1502 ctx_header_words = roundup(ctx_header_bytes, sizeof(u32));
1503 ctx_header_words >>= 2; 1503 ctx_header_words >>= 2;
1504 1504
1505 gk20a_mm_l2_flush(g, true); 1505 g->ops.mm.l2_flush(g, true);
1506 1506
1507 for (i = 0; i < ctx_header_words; i++) { 1507 for (i = 0; i < ctx_header_words; i++) {
1508 data = gk20a_mem_rd32(ctx_ptr, i); 1508 data = gk20a_mem_rd32(ctx_ptr, i);
@@ -1565,7 +1565,7 @@ int gr_gk20a_update_smpc_ctxsw_mode(struct gk20a *g,
1565 1565
1566 /* Channel gr_ctx buffer is gpu cacheable. 1566 /* Channel gr_ctx buffer is gpu cacheable.
1567 Flush and invalidate before cpu update. */ 1567 Flush and invalidate before cpu update. */
1568 gk20a_mm_l2_flush(g, true); 1568 g->ops.mm.l2_flush(g, true);
1569 1569
1570 ctx_ptr = vmap(ch_ctx->gr_ctx->pages, 1570 ctx_ptr = vmap(ch_ctx->gr_ctx->pages,
1571 PAGE_ALIGN(ch_ctx->gr_ctx->size) >> PAGE_SHIFT, 1571 PAGE_ALIGN(ch_ctx->gr_ctx->size) >> PAGE_SHIFT,
@@ -1605,7 +1605,7 @@ int gr_gk20a_load_golden_ctx_image(struct gk20a *g,
1605 1605
1606 /* Channel gr_ctx buffer is gpu cacheable. 1606 /* Channel gr_ctx buffer is gpu cacheable.
1607 Flush and invalidate before cpu update. */ 1607 Flush and invalidate before cpu update. */
1608 gk20a_mm_l2_flush(g, true); 1608 g->ops.mm.l2_flush(g, true);
1609 1609
1610 ctx_ptr = vmap(ch_ctx->gr_ctx->pages, 1610 ctx_ptr = vmap(ch_ctx->gr_ctx->pages,
1611 PAGE_ALIGN(ch_ctx->gr_ctx->size) >> PAGE_SHIFT, 1611 PAGE_ALIGN(ch_ctx->gr_ctx->size) >> PAGE_SHIFT,
@@ -7003,7 +7003,7 @@ int gr_gk20a_exec_ctx_ops(struct channel_gk20a *ch,
7003 goto cleanup; 7003 goto cleanup;
7004 } 7004 }
7005 7005
7006 gk20a_mm_l2_flush(g, true); 7006 g->ops.mm.l2_flush(g, true);
7007 7007
7008 /* write to appropriate place in context image, 7008 /* write to appropriate place in context image,
7009 * first have to figure out where that really is */ 7009 * first have to figure out where that really is */