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path: root/drivers/gpu/nvgpu/gk20a/gr_gk20a.c
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Diffstat (limited to 'drivers/gpu/nvgpu/gk20a/gr_gk20a.c')
-rw-r--r--drivers/gpu/nvgpu/gk20a/gr_gk20a.c11
1 files changed, 10 insertions, 1 deletions
diff --git a/drivers/gpu/nvgpu/gk20a/gr_gk20a.c b/drivers/gpu/nvgpu/gk20a/gr_gk20a.c
index bec33293..9d85a5ef 100644
--- a/drivers/gpu/nvgpu/gk20a/gr_gk20a.c
+++ b/drivers/gpu/nvgpu/gk20a/gr_gk20a.c
@@ -7568,6 +7568,15 @@ static int add_ctxsw_buffer_map_entries_gpcs(struct gk20a *g,
7568 return 0; 7568 return 0;
7569} 7569}
7570 7570
7571int gr_gk20a_add_ctxsw_reg_perf_pma(struct ctxsw_buf_offset_map_entry *map,
7572 struct aiv_list_gk20a *regs,
7573 u32 *count, u32 *offset,
7574 u32 max_cnt, u32 base, u32 mask)
7575{
7576 return add_ctxsw_buffer_map_entries(map, regs,
7577 count, offset, max_cnt, base, mask);
7578}
7579
7571/* 7580/*
7572 * PM CTXSW BUFFER LAYOUT : 7581 * PM CTXSW BUFFER LAYOUT :
7573 *|---------------------------------------------|0x00 <----PM CTXSW BUFFER BASE 7582 *|---------------------------------------------|0x00 <----PM CTXSW BUFFER BASE
@@ -7671,7 +7680,7 @@ static int gr_gk20a_create_hwpm_ctxsw_buffer_offset_map(struct gk20a *g)
7671 goto cleanup; 7680 goto cleanup;
7672 7681
7673 /* Add entries from _LIST_nv_perf_pma_ctx_reg*/ 7682 /* Add entries from _LIST_nv_perf_pma_ctx_reg*/
7674 if (add_ctxsw_buffer_map_entries(map, &g->gr.ctx_vars.ctxsw_regs.perf_pma, 7683 if (g->ops.gr.add_ctxsw_reg_perf_pma(map, &g->gr.ctx_vars.ctxsw_regs.perf_pma,
7675 &count, &offset, hwpm_ctxsw_reg_count_max, 0, ~0)) 7684 &count, &offset, hwpm_ctxsw_reg_count_max, 0, ~0))
7676 goto cleanup; 7685 goto cleanup;
7677 7686