diff options
Diffstat (limited to 'drivers/gpu/nvgpu/gk20a/gr_gk20a.c')
-rw-r--r-- | drivers/gpu/nvgpu/gk20a/gr_gk20a.c | 11 |
1 files changed, 4 insertions, 7 deletions
diff --git a/drivers/gpu/nvgpu/gk20a/gr_gk20a.c b/drivers/gpu/nvgpu/gk20a/gr_gk20a.c index 0e787356..22093a34 100644 --- a/drivers/gpu/nvgpu/gk20a/gr_gk20a.c +++ b/drivers/gpu/nvgpu/gk20a/gr_gk20a.c | |||
@@ -380,10 +380,9 @@ int gr_gk20a_wait_fe_idle(struct gk20a *g, unsigned long duration_ms, | |||
380 | { | 380 | { |
381 | u32 val; | 381 | u32 val; |
382 | u32 delay = expect_delay; | 382 | u32 delay = expect_delay; |
383 | struct gk20a_platform *platform = dev_get_drvdata(g->dev); | ||
384 | struct nvgpu_timeout timeout; | 383 | struct nvgpu_timeout timeout; |
385 | 384 | ||
386 | if (platform->is_fmodel) | 385 | if (g->is_fmodel) |
387 | return 0; | 386 | return 0; |
388 | 387 | ||
389 | gk20a_dbg_fn(""); | 388 | gk20a_dbg_fn(""); |
@@ -1581,7 +1580,6 @@ static int gr_gk20a_init_golden_ctx_image(struct gk20a *g, | |||
1581 | struct aiv_list_gk20a *sw_ctx_load = &g->gr.ctx_vars.sw_ctx_load; | 1580 | struct aiv_list_gk20a *sw_ctx_load = &g->gr.ctx_vars.sw_ctx_load; |
1582 | struct av_list_gk20a *sw_method_init = &g->gr.ctx_vars.sw_method_init; | 1581 | struct av_list_gk20a *sw_method_init = &g->gr.ctx_vars.sw_method_init; |
1583 | u32 last_method_data = 0; | 1582 | u32 last_method_data = 0; |
1584 | struct gk20a_platform *platform = dev_get_drvdata(g->dev); | ||
1585 | struct ctx_header_desc *ctx = &c->ch_ctx.ctx_header; | 1583 | struct ctx_header_desc *ctx = &c->ch_ctx.ctx_header; |
1586 | struct nvgpu_mem *ctxheader = &ctx->mem; | 1584 | struct nvgpu_mem *ctxheader = &ctx->mem; |
1587 | 1585 | ||
@@ -1595,7 +1593,7 @@ static int gr_gk20a_init_golden_ctx_image(struct gk20a *g, | |||
1595 | if (gr->ctx_vars.golden_image_initialized) { | 1593 | if (gr->ctx_vars.golden_image_initialized) { |
1596 | goto clean_up; | 1594 | goto clean_up; |
1597 | } | 1595 | } |
1598 | if (!platform->is_fmodel) { | 1596 | if (!g->is_fmodel) { |
1599 | struct nvgpu_timeout timeout; | 1597 | struct nvgpu_timeout timeout; |
1600 | 1598 | ||
1601 | nvgpu_timeout_init(g, &timeout, FE_PWR_MODE_TIMEOUT_MAX / 1000, | 1599 | nvgpu_timeout_init(g, &timeout, FE_PWR_MODE_TIMEOUT_MAX / 1000, |
@@ -1638,7 +1636,7 @@ static int gr_gk20a_init_golden_ctx_image(struct gk20a *g, | |||
1638 | gk20a_readl(g, gr_fecs_ctxsw_reset_ctl_r()); | 1636 | gk20a_readl(g, gr_fecs_ctxsw_reset_ctl_r()); |
1639 | nvgpu_udelay(10); | 1637 | nvgpu_udelay(10); |
1640 | 1638 | ||
1641 | if (!platform->is_fmodel) { | 1639 | if (!g->is_fmodel) { |
1642 | struct nvgpu_timeout timeout; | 1640 | struct nvgpu_timeout timeout; |
1643 | 1641 | ||
1644 | nvgpu_timeout_init(g, &timeout, FE_PWR_MODE_TIMEOUT_MAX / 1000, | 1642 | nvgpu_timeout_init(g, &timeout, FE_PWR_MODE_TIMEOUT_MAX / 1000, |
@@ -2580,11 +2578,10 @@ static void gr_gk20a_load_falcon_with_bootloader(struct gk20a *g) | |||
2580 | int gr_gk20a_load_ctxsw_ucode(struct gk20a *g) | 2578 | int gr_gk20a_load_ctxsw_ucode(struct gk20a *g) |
2581 | { | 2579 | { |
2582 | int err; | 2580 | int err; |
2583 | struct gk20a_platform *platform = dev_get_drvdata(g->dev); | ||
2584 | 2581 | ||
2585 | gk20a_dbg_fn(""); | 2582 | gk20a_dbg_fn(""); |
2586 | 2583 | ||
2587 | if (platform->is_fmodel) { | 2584 | if (g->is_fmodel) { |
2588 | gk20a_writel(g, gr_fecs_ctxsw_mailbox_r(7), | 2585 | gk20a_writel(g, gr_fecs_ctxsw_mailbox_r(7), |
2589 | gr_fecs_ctxsw_mailbox_value_f(0xc0de7777)); | 2586 | gr_fecs_ctxsw_mailbox_value_f(0xc0de7777)); |
2590 | gk20a_writel(g, gr_gpccs_ctxsw_mailbox_r(7), | 2587 | gk20a_writel(g, gr_gpccs_ctxsw_mailbox_r(7), |