1 files changed, 25 insertions, 1 deletions

diff --git a/drivers/gpu/nvgpu/gk20a/gr_gk20a.c b/drivers/gpu/nvgpu/gk20a/gr_gk20a.c
index 7e37a965..a10650be 100644
--- a/drivers/gpu/nvgpu/gk20a/gr_gk20a.c
+++ b/drivers/gpu/nvgpu/gk20a/gr_gk20a.c
@@ -56,6 +56,7 @@
 #include "debug_gk20a.h"
 #include "semaphore_gk20a.h"
 #include "platform_gk20a.h"
+#include "ctxsw_trace_gk20a.h"
 
 #define BLK_SIZE (256)
 
@@ -2855,6 +2856,13 @@ int gk20a_alloc_obj_ctx(struct channel_gk20a  *c,
                                 "fail to load golden ctx image");
                         goto out;
                 }
+                if (g->ops.fecs_trace.bind_channel) {
+                        err = g->ops.fecs_trace.bind_channel(g, c);
+                        if (err) {
+                                gk20a_warn(dev_from_gk20a(g),
+                                        "fail to bind channel for ctxsw trace");
+                        }
+                }
                 c->first_init = true;
         }
 
@@ -4217,7 +4225,15 @@ out:
 static void gr_gk20a_load_gating_prod(struct gk20a *g)
 {
         /* slcg prod values */
-        g->ops.clock_gating.slcg_gr_load_gating_prod(g, g->slcg_enabled);
+        if (g->ops.clock_gating.slcg_bus_load_gating_prod)
+                g->ops.clock_gating.slcg_bus_load_gating_prod(g,
+                                g->slcg_enabled);
+        if (g->ops.clock_gating.slcg_chiplet_load_gating_prod)
+                g->ops.clock_gating.slcg_chiplet_load_gating_prod(g,
+                                g->slcg_enabled);
+        if (g->ops.clock_gating.slcg_gr_load_gating_prod)
+                g->ops.clock_gating.slcg_gr_load_gating_prod(g,
+                                g->slcg_enabled);
         if (g->ops.clock_gating.slcg_ctxsw_firmware_load_gating_prod)
                 g->ops.clock_gating.slcg_ctxsw_firmware_load_gating_prod(g,
                                 g->slcg_enabled);
@@ -4227,6 +4243,12 @@ static void gr_gk20a_load_gating_prod(struct gk20a *g)
                                 g->slcg_enabled);
 
         /* blcg prod values */
+        if (g->ops.clock_gating.blcg_bus_load_gating_prod)
+                g->ops.clock_gating.blcg_bus_load_gating_prod(g,
+                                g->blcg_enabled);
+        if (g->ops.clock_gating.blcg_ce_load_gating_prod)
+                g->ops.clock_gating.blcg_ce_load_gating_prod(g,
+                                g->blcg_enabled);
         g->ops.clock_gating.blcg_gr_load_gating_prod(g, g->blcg_enabled);
         if (g->ops.clock_gating.blcg_ctxsw_firmware_load_gating_prod)
                 g->ops.clock_gating.blcg_ctxsw_firmware_load_gating_prod(g,
@@ -7463,6 +7485,7 @@ static int gr_gk20a_dump_gr_status_regs(struct gk20a *g,
         return 0;
 }
 
+#ifdef CONFIG_DEBUG_FS
 int gr_gk20a_debugfs_init(struct gk20a *g)
 {
         struct gk20a_platform *platform = platform_get_drvdata(g->dev);
@@ -7474,6 +7497,7 @@ int gr_gk20a_debugfs_init(struct gk20a *g)
 
         return 0;
 }
+#endif
 
 static void gr_gk20a_init_cyclestats(struct gk20a *g)
 {