summaryrefslogtreecommitdiffstats
path: root/drivers/gpu/nvgpu/gk20a/gr_gk20a.c
diff options
context:
space:
mode:
Diffstat (limited to 'drivers/gpu/nvgpu/gk20a/gr_gk20a.c')
-rw-r--r--drivers/gpu/nvgpu/gk20a/gr_gk20a.c33
1 files changed, 25 insertions, 8 deletions
diff --git a/drivers/gpu/nvgpu/gk20a/gr_gk20a.c b/drivers/gpu/nvgpu/gk20a/gr_gk20a.c
index 39d6879b..2969743b 100644
--- a/drivers/gpu/nvgpu/gk20a/gr_gk20a.c
+++ b/drivers/gpu/nvgpu/gk20a/gr_gk20a.c
@@ -3983,10 +3983,14 @@ static int gr_gk20a_load_zbc_table(struct gk20a *g, struct gr_gk20a *gr)
3983int gr_gk20a_load_zbc_default_table(struct gk20a *g, struct gr_gk20a *gr) 3983int gr_gk20a_load_zbc_default_table(struct gk20a *g, struct gr_gk20a *gr)
3984{ 3984{
3985 struct zbc_entry zbc_val; 3985 struct zbc_entry zbc_val;
3986 u32 i; 3986 u32 i = 0;
3987 int err; 3987 int err = 0;
3988 3988
3989 nvgpu_mutex_init(&gr->zbc_lock); 3989 err = nvgpu_mutex_init(&gr->zbc_lock);
3990 if (err != 0) {
3991 nvgpu_err(g, "Error in zbc_lock mutex initialization");
3992 return err;
3993 }
3990 3994
3991 /* load default color table */ 3995 /* load default color table */
3992 zbc_val.type = GK20A_ZBC_TYPE_COLOR; 3996 zbc_val.type = GK20A_ZBC_TYPE_COLOR;
@@ -4749,7 +4753,7 @@ static int gr_gk20a_init_access_map(struct gk20a *g)
4749static int gk20a_init_gr_setup_sw(struct gk20a *g) 4753static int gk20a_init_gr_setup_sw(struct gk20a *g)
4750{ 4754{
4751 struct gr_gk20a *gr = &g->gr; 4755 struct gr_gk20a *gr = &g->gr;
4752 int err; 4756 int err = 0;
4753 4757
4754 nvgpu_log_fn(g, " "); 4758 nvgpu_log_fn(g, " ");
4755 4759
@@ -4761,7 +4765,11 @@ static int gk20a_init_gr_setup_sw(struct gk20a *g)
4761 gr->g = g; 4765 gr->g = g;
4762 4766
4763#if defined(CONFIG_GK20A_CYCLE_STATS) 4767#if defined(CONFIG_GK20A_CYCLE_STATS)
4764 nvgpu_mutex_init(&g->gr.cs_lock); 4768 err = nvgpu_mutex_init(&g->gr.cs_lock);
4769 if (err != 0) {
4770 nvgpu_err(g, "Error in gr.cs_lock mutex initialization");
4771 return err;
4772 }
4765#endif 4773#endif
4766 4774
4767 err = gr_gk20a_init_gr_config(g, gr); 4775 err = gr_gk20a_init_gr_config(g, gr);
@@ -4802,7 +4810,12 @@ static int gk20a_init_gr_setup_sw(struct gk20a *g)
4802 if (g->ops.gr.init_gfxp_wfi_timeout_count) 4810 if (g->ops.gr.init_gfxp_wfi_timeout_count)
4803 g->ops.gr.init_gfxp_wfi_timeout_count(g); 4811 g->ops.gr.init_gfxp_wfi_timeout_count(g);
4804 4812
4805 nvgpu_mutex_init(&gr->ctx_mutex); 4813 err = nvgpu_mutex_init(&gr->ctx_mutex);
4814 if (err != 0) {
4815 nvgpu_err(g, "Error in gr.ctx_mutex initialization");
4816 goto clean_up;
4817 }
4818
4806 nvgpu_spinlock_init(&gr->ch_tlb_lock); 4819 nvgpu_spinlock_init(&gr->ch_tlb_lock);
4807 4820
4808 gr->remove_support = gk20a_remove_gr_support; 4821 gr->remove_support = gk20a_remove_gr_support;
@@ -4869,12 +4882,16 @@ static int gk20a_init_gr_bind_fecs_elpg(struct gk20a *g)
4869 4882
4870int gk20a_init_gr_support(struct gk20a *g) 4883int gk20a_init_gr_support(struct gk20a *g)
4871{ 4884{
4872 u32 err; 4885 int err = 0;
4873 4886
4874 nvgpu_log_fn(g, " "); 4887 nvgpu_log_fn(g, " ");
4875 4888
4876 /* this is required before gr_gk20a_init_ctx_state */ 4889 /* this is required before gr_gk20a_init_ctx_state */
4877 nvgpu_mutex_init(&g->gr.fecs_mutex); 4890 err = nvgpu_mutex_init(&g->gr.fecs_mutex);
4891 if (err != 0) {
4892 nvgpu_err(g, "Error in gr.fecs_mutex initialization");
4893 return err;
4894 }
4878 4895
4879 err = gr_gk20a_init_ctxsw(g); 4896 err = gr_gk20a_init_ctxsw(g);
4880 if (err) 4897 if (err)