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path: root/drivers/gpu/nvgpu/gk20a/gr_gk20a.c
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Diffstat (limited to 'drivers/gpu/nvgpu/gk20a/gr_gk20a.c')
-rw-r--r--drivers/gpu/nvgpu/gk20a/gr_gk20a.c6
1 files changed, 3 insertions, 3 deletions
diff --git a/drivers/gpu/nvgpu/gk20a/gr_gk20a.c b/drivers/gpu/nvgpu/gk20a/gr_gk20a.c
index 91ffbb7e..a40d93fd 100644
--- a/drivers/gpu/nvgpu/gk20a/gr_gk20a.c
+++ b/drivers/gpu/nvgpu/gk20a/gr_gk20a.c
@@ -345,7 +345,7 @@ int gr_gk20a_wait_idle(struct gk20a *g, unsigned long duration_ms,
345 do { 345 do {
346 /* fmodel: host gets fifo_engine_status(gr) from gr 346 /* fmodel: host gets fifo_engine_status(gr) from gr
347 only when gr_status is read */ 347 only when gr_status is read */
348 gk20a_readl(g, gr_status_r()); 348 (void) gk20a_readl(g, gr_status_r());
349 349
350 gr_enabled = gk20a_readl(g, mc_enable_r()) & 350 gr_enabled = gk20a_readl(g, mc_enable_r()) &
351 mc_enable_pgraph_enabled_f(); 351 mc_enable_pgraph_enabled_f();
@@ -1482,7 +1482,7 @@ static int gr_gk20a_init_golden_ctx_image(struct gk20a *g,
1482 gr_fecs_ctxsw_reset_ctl_sys_context_reset_enabled_f() | 1482 gr_fecs_ctxsw_reset_ctl_sys_context_reset_enabled_f() |
1483 gr_fecs_ctxsw_reset_ctl_gpc_context_reset_enabled_f() | 1483 gr_fecs_ctxsw_reset_ctl_gpc_context_reset_enabled_f() |
1484 gr_fecs_ctxsw_reset_ctl_be_context_reset_enabled_f()); 1484 gr_fecs_ctxsw_reset_ctl_be_context_reset_enabled_f());
1485 gk20a_readl(g, gr_fecs_ctxsw_reset_ctl_r()); 1485 (void) gk20a_readl(g, gr_fecs_ctxsw_reset_ctl_r());
1486 nvgpu_udelay(10); 1486 nvgpu_udelay(10);
1487 1487
1488 gk20a_writel(g, gr_fecs_ctxsw_reset_ctl_r(), 1488 gk20a_writel(g, gr_fecs_ctxsw_reset_ctl_r(),
@@ -1495,7 +1495,7 @@ static int gr_gk20a_init_golden_ctx_image(struct gk20a *g,
1495 gr_fecs_ctxsw_reset_ctl_sys_context_reset_disabled_f() | 1495 gr_fecs_ctxsw_reset_ctl_sys_context_reset_disabled_f() |
1496 gr_fecs_ctxsw_reset_ctl_gpc_context_reset_disabled_f() | 1496 gr_fecs_ctxsw_reset_ctl_gpc_context_reset_disabled_f() |
1497 gr_fecs_ctxsw_reset_ctl_be_context_reset_disabled_f()); 1497 gr_fecs_ctxsw_reset_ctl_be_context_reset_disabled_f());
1498 gk20a_readl(g, gr_fecs_ctxsw_reset_ctl_r()); 1498 (void) gk20a_readl(g, gr_fecs_ctxsw_reset_ctl_r());
1499 nvgpu_udelay(10); 1499 nvgpu_udelay(10);
1500 1500
1501 if (!nvgpu_is_enabled(g, NVGPU_IS_FMODEL)) { 1501 if (!nvgpu_is_enabled(g, NVGPU_IS_FMODEL)) {