diff options
Diffstat (limited to 'drivers/gpu/nvgpu/gk20a/gr_ctx_gk20a_sim.c')
-rw-r--r-- | drivers/gpu/nvgpu/gk20a/gr_ctx_gk20a_sim.c | 14 |
1 files changed, 14 insertions, 0 deletions
diff --git a/drivers/gpu/nvgpu/gk20a/gr_ctx_gk20a_sim.c b/drivers/gpu/nvgpu/gk20a/gr_ctx_gk20a_sim.c index 01c7ed3c..6d6352df 100644 --- a/drivers/gpu/nvgpu/gk20a/gr_ctx_gk20a_sim.c +++ b/drivers/gpu/nvgpu/gk20a/gr_ctx_gk20a_sim.c | |||
@@ -63,6 +63,8 @@ int gr_gk20a_init_ctx_vars_sim(struct gk20a *g, struct gr_gk20a *gr) | |||
63 | &g->gr.ctx_vars.sw_ctx_load.count); | 63 | &g->gr.ctx_vars.sw_ctx_load.count); |
64 | g->sim->esc_readl(g, "GRCTX_SW_VEID_BUNDLE_INIT_SIZE", 0, | 64 | g->sim->esc_readl(g, "GRCTX_SW_VEID_BUNDLE_INIT_SIZE", 0, |
65 | &g->gr.ctx_vars.sw_veid_bundle_init.count); | 65 | &g->gr.ctx_vars.sw_veid_bundle_init.count); |
66 | g->sim->esc_readl(g, "GRCTX_SW_BUNDLE64_INIT_SIZE", 0, | ||
67 | &g->gr.ctx_vars.sw_bundle64_init.count); | ||
66 | 68 | ||
67 | g->sim->esc_readl(g, "GRCTX_NONCTXSW_REG_SIZE", 0, | 69 | g->sim->esc_readl(g, "GRCTX_NONCTXSW_REG_SIZE", 0, |
68 | &g->gr.ctx_vars.sw_non_ctx_load.count); | 70 | &g->gr.ctx_vars.sw_non_ctx_load.count); |
@@ -92,6 +94,7 @@ int gr_gk20a_init_ctx_vars_sim(struct gk20a *g, struct gr_gk20a *gr) | |||
92 | err |= !alloc_u32_list_gk20a(g, &g->gr.ctx_vars.ucode.gpccs.inst); | 94 | err |= !alloc_u32_list_gk20a(g, &g->gr.ctx_vars.ucode.gpccs.inst); |
93 | err |= !alloc_u32_list_gk20a(g, &g->gr.ctx_vars.ucode.gpccs.data); | 95 | err |= !alloc_u32_list_gk20a(g, &g->gr.ctx_vars.ucode.gpccs.data); |
94 | err |= !alloc_av_list_gk20a(g, &g->gr.ctx_vars.sw_bundle_init); | 96 | err |= !alloc_av_list_gk20a(g, &g->gr.ctx_vars.sw_bundle_init); |
97 | err |= !alloc_av64_list_gk20a(g, &g->gr.ctx_vars.sw_bundle64_init); | ||
95 | err |= !alloc_av_list_gk20a(g, &g->gr.ctx_vars.sw_method_init); | 98 | err |= !alloc_av_list_gk20a(g, &g->gr.ctx_vars.sw_method_init); |
96 | err |= !alloc_aiv_list_gk20a(g, &g->gr.ctx_vars.sw_ctx_load); | 99 | err |= !alloc_aiv_list_gk20a(g, &g->gr.ctx_vars.sw_ctx_load); |
97 | err |= !alloc_av_list_gk20a(g, &g->gr.ctx_vars.sw_non_ctx_load); | 100 | err |= !alloc_av_list_gk20a(g, &g->gr.ctx_vars.sw_non_ctx_load); |
@@ -168,6 +171,17 @@ int gr_gk20a_init_ctx_vars_sim(struct gk20a *g, struct gr_gk20a *gr) | |||
168 | i, &l[i].value); | 171 | i, &l[i].value); |
169 | } | 172 | } |
170 | 173 | ||
174 | for (i = 0; i < g->gr.ctx_vars.sw_bundle64_init.count; i++) { | ||
175 | struct av64_gk20a *l = g->gr.ctx_vars.sw_bundle64_init.l; | ||
176 | |||
177 | g->sim->esc_readl(g, "GRCTX_SW_BUNDLE64_INIT:ADDR", | ||
178 | i, &l[i].addr); | ||
179 | g->sim->esc_readl(g, "GRCTX_SW_BUNDLE64_INIT:VALUE_LO", | ||
180 | i, &l[i].value_lo); | ||
181 | g->sim->esc_readl(g, "GRCTX_SW_BUNDLE64_INIT:VALUE_HI", | ||
182 | i, &l[i].value_hi); | ||
183 | } | ||
184 | |||
171 | for (i = 0; i < g->gr.ctx_vars.ctxsw_regs.sys.count; i++) { | 185 | for (i = 0; i < g->gr.ctx_vars.ctxsw_regs.sys.count; i++) { |
172 | struct aiv_gk20a *l = g->gr.ctx_vars.ctxsw_regs.sys.l; | 186 | struct aiv_gk20a *l = g->gr.ctx_vars.ctxsw_regs.sys.l; |
173 | g->sim->esc_readl(g, "GRCTX_REG_LIST_SYS:ADDR", | 187 | g->sim->esc_readl(g, "GRCTX_REG_LIST_SYS:ADDR", |