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Diffstat (limited to 'drivers/gpu/nvgpu/gk20a/gr_ctx_gk20a.c')
-rw-r--r--drivers/gpu/nvgpu/gk20a/gr_ctx_gk20a.c420
1 files changed, 420 insertions, 0 deletions
diff --git a/drivers/gpu/nvgpu/gk20a/gr_ctx_gk20a.c b/drivers/gpu/nvgpu/gk20a/gr_ctx_gk20a.c
new file mode 100644
index 00000000..3d7861d4
--- /dev/null
+++ b/drivers/gpu/nvgpu/gk20a/gr_ctx_gk20a.c
@@ -0,0 +1,420 @@
1/*
2 * drivers/video/tegra/host/gk20a/gr_ctx_gk20a.c
3 *
4 * GK20A Graphics Context
5 *
6 * Copyright (c) 2011-2017, NVIDIA CORPORATION. All rights reserved.
7 *
8 * Permission is hereby granted, free of charge, to any person obtaining a
9 * copy of this software and associated documentation files (the "Software"),
10 * to deal in the Software without restriction, including without limitation
11 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
12 * and/or sell copies of the Software, and to permit persons to whom the
13 * Software is furnished to do so, subject to the following conditions:
14 *
15 * The above copyright notice and this permission notice shall be included in
16 * all copies or substantial portions of the Software.
17 *
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
19 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
20 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
21 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
22 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
23 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
24 * DEALINGS IN THE SOFTWARE.
25 */
26
27#include <nvgpu/nvgpu_common.h>
28#include <nvgpu/kmem.h>
29#include <nvgpu/log.h>
30#include <nvgpu/firmware.h>
31#include <nvgpu/enabled.h>
32
33#include "gk20a.h"
34#include "gr_ctx_gk20a.h"
35
36#include <nvgpu/hw/gk20a/hw_gr_gk20a.h>
37
38static int gr_gk20a_alloc_load_netlist_u32(struct gk20a *g, u32 *src, u32 len,
39 struct u32_list_gk20a *u32_list)
40{
41 u32_list->count = (len + sizeof(u32) - 1) / sizeof(u32);
42 if (!alloc_u32_list_gk20a(g, u32_list))
43 return -ENOMEM;
44
45 memcpy(u32_list->l, src, len);
46
47 return 0;
48}
49
50static int gr_gk20a_alloc_load_netlist_av(struct gk20a *g, u32 *src, u32 len,
51 struct av_list_gk20a *av_list)
52{
53 av_list->count = len / sizeof(struct av_gk20a);
54 if (!alloc_av_list_gk20a(g, av_list))
55 return -ENOMEM;
56
57 memcpy(av_list->l, src, len);
58
59 return 0;
60}
61
62static int gr_gk20a_alloc_load_netlist_aiv(struct gk20a *g, u32 *src, u32 len,
63 struct aiv_list_gk20a *aiv_list)
64{
65 aiv_list->count = len / sizeof(struct aiv_gk20a);
66 if (!alloc_aiv_list_gk20a(g, aiv_list))
67 return -ENOMEM;
68
69 memcpy(aiv_list->l, src, len);
70
71 return 0;
72}
73
74static int gr_gk20a_init_ctx_vars_fw(struct gk20a *g, struct gr_gk20a *gr)
75{
76 struct nvgpu_firmware *netlist_fw;
77 struct netlist_image *netlist = NULL;
78 char name[MAX_NETLIST_NAME];
79 u32 i, major_v = ~0, major_v_hw, netlist_num;
80 int net, max, err = -ENOENT;
81
82 gk20a_dbg_fn("");
83
84 if (g->ops.gr_ctx.is_fw_defined()) {
85 net = NETLIST_FINAL;
86 max = 0;
87 major_v_hw = ~0;
88 g->gr.ctx_vars.dynamic = false;
89 } else {
90 net = NETLIST_SLOT_A;
91 max = MAX_NETLIST;
92 major_v_hw = gk20a_readl(g,
93 gr_fecs_ctx_state_store_major_rev_id_r());
94 g->gr.ctx_vars.dynamic = true;
95 }
96
97 for (; net < max; net++) {
98 if (g->ops.gr_ctx.get_netlist_name(g, net, name) != 0) {
99 nvgpu_warn(g, "invalid netlist index %d", net);
100 continue;
101 }
102
103 netlist_fw = nvgpu_request_firmware(g, name, 0);
104 if (!netlist_fw) {
105 nvgpu_warn(g, "failed to load netlist %s", name);
106 continue;
107 }
108
109 netlist = (struct netlist_image *)netlist_fw->data;
110
111 for (i = 0; i < netlist->header.regions; i++) {
112 u32 *src = (u32 *)((u8 *)netlist + netlist->regions[i].data_offset);
113 u32 size = netlist->regions[i].data_size;
114
115 switch (netlist->regions[i].region_id) {
116 case NETLIST_REGIONID_FECS_UCODE_DATA:
117 gk20a_dbg_info("NETLIST_REGIONID_FECS_UCODE_DATA");
118 err = gr_gk20a_alloc_load_netlist_u32(g,
119 src, size, &g->gr.ctx_vars.ucode.fecs.data);
120 if (err)
121 goto clean_up;
122 break;
123 case NETLIST_REGIONID_FECS_UCODE_INST:
124 gk20a_dbg_info("NETLIST_REGIONID_FECS_UCODE_INST");
125 err = gr_gk20a_alloc_load_netlist_u32(g,
126 src, size, &g->gr.ctx_vars.ucode.fecs.inst);
127 if (err)
128 goto clean_up;
129 break;
130 case NETLIST_REGIONID_GPCCS_UCODE_DATA:
131 gk20a_dbg_info("NETLIST_REGIONID_GPCCS_UCODE_DATA");
132 err = gr_gk20a_alloc_load_netlist_u32(g,
133 src, size, &g->gr.ctx_vars.ucode.gpccs.data);
134 if (err)
135 goto clean_up;
136 break;
137 case NETLIST_REGIONID_GPCCS_UCODE_INST:
138 gk20a_dbg_info("NETLIST_REGIONID_GPCCS_UCODE_INST");
139 err = gr_gk20a_alloc_load_netlist_u32(g,
140 src, size, &g->gr.ctx_vars.ucode.gpccs.inst);
141 if (err)
142 goto clean_up;
143 break;
144 case NETLIST_REGIONID_SW_BUNDLE_INIT:
145 gk20a_dbg_info("NETLIST_REGIONID_SW_BUNDLE_INIT");
146 err = gr_gk20a_alloc_load_netlist_av(g,
147 src, size, &g->gr.ctx_vars.sw_bundle_init);
148 if (err)
149 goto clean_up;
150 break;
151 case NETLIST_REGIONID_SW_METHOD_INIT:
152 gk20a_dbg_info("NETLIST_REGIONID_SW_METHOD_INIT");
153 err = gr_gk20a_alloc_load_netlist_av(g,
154 src, size, &g->gr.ctx_vars.sw_method_init);
155 if (err)
156 goto clean_up;
157 break;
158 case NETLIST_REGIONID_SW_CTX_LOAD:
159 gk20a_dbg_info("NETLIST_REGIONID_SW_CTX_LOAD");
160 err = gr_gk20a_alloc_load_netlist_aiv(g,
161 src, size, &g->gr.ctx_vars.sw_ctx_load);
162 if (err)
163 goto clean_up;
164 break;
165 case NETLIST_REGIONID_SW_NON_CTX_LOAD:
166 gk20a_dbg_info("NETLIST_REGIONID_SW_NON_CTX_LOAD");
167 err = gr_gk20a_alloc_load_netlist_av(g,
168 src, size, &g->gr.ctx_vars.sw_non_ctx_load);
169 if (err)
170 goto clean_up;
171 break;
172 case NETLIST_REGIONID_SWVEIDBUNDLEINIT:
173 gk20a_dbg_info(
174 "NETLIST_REGIONID_SW_VEID_BUNDLE_INIT");
175 err = gr_gk20a_alloc_load_netlist_av(g,
176 src, size,
177 &g->gr.ctx_vars.sw_veid_bundle_init);
178 if (err)
179 goto clean_up;
180 break;
181 case NETLIST_REGIONID_CTXREG_SYS:
182 gk20a_dbg_info("NETLIST_REGIONID_CTXREG_SYS");
183 err = gr_gk20a_alloc_load_netlist_aiv(g,
184 src, size, &g->gr.ctx_vars.ctxsw_regs.sys);
185 if (err)
186 goto clean_up;
187 break;
188 case NETLIST_REGIONID_CTXREG_GPC:
189 gk20a_dbg_info("NETLIST_REGIONID_CTXREG_GPC");
190 err = gr_gk20a_alloc_load_netlist_aiv(g,
191 src, size, &g->gr.ctx_vars.ctxsw_regs.gpc);
192 if (err)
193 goto clean_up;
194 break;
195 case NETLIST_REGIONID_CTXREG_TPC:
196 gk20a_dbg_info("NETLIST_REGIONID_CTXREG_TPC");
197 err = gr_gk20a_alloc_load_netlist_aiv(g,
198 src, size, &g->gr.ctx_vars.ctxsw_regs.tpc);
199 if (err)
200 goto clean_up;
201 break;
202 case NETLIST_REGIONID_CTXREG_ZCULL_GPC:
203 gk20a_dbg_info("NETLIST_REGIONID_CTXREG_ZCULL_GPC");
204 err = gr_gk20a_alloc_load_netlist_aiv(g,
205 src, size, &g->gr.ctx_vars.ctxsw_regs.zcull_gpc);
206 if (err)
207 goto clean_up;
208 break;
209 case NETLIST_REGIONID_CTXREG_PPC:
210 gk20a_dbg_info("NETLIST_REGIONID_CTXREG_PPC");
211 err = gr_gk20a_alloc_load_netlist_aiv(g,
212 src, size, &g->gr.ctx_vars.ctxsw_regs.ppc);
213 if (err)
214 goto clean_up;
215 break;
216 case NETLIST_REGIONID_CTXREG_PM_SYS:
217 gk20a_dbg_info("NETLIST_REGIONID_CTXREG_PM_SYS");
218 err = gr_gk20a_alloc_load_netlist_aiv(g,
219 src, size, &g->gr.ctx_vars.ctxsw_regs.pm_sys);
220 if (err)
221 goto clean_up;
222 break;
223 case NETLIST_REGIONID_CTXREG_PM_GPC:
224 gk20a_dbg_info("NETLIST_REGIONID_CTXREG_PM_GPC");
225 err = gr_gk20a_alloc_load_netlist_aiv(g,
226 src, size, &g->gr.ctx_vars.ctxsw_regs.pm_gpc);
227 if (err)
228 goto clean_up;
229 break;
230 case NETLIST_REGIONID_CTXREG_PM_TPC:
231 gk20a_dbg_info("NETLIST_REGIONID_CTXREG_PM_TPC");
232 err = gr_gk20a_alloc_load_netlist_aiv(g,
233 src, size, &g->gr.ctx_vars.ctxsw_regs.pm_tpc);
234 if (err)
235 goto clean_up;
236 break;
237 case NETLIST_REGIONID_BUFFER_SIZE:
238 g->gr.ctx_vars.buffer_size = *src;
239 gk20a_dbg_info("NETLIST_REGIONID_BUFFER_SIZE : %d",
240 g->gr.ctx_vars.buffer_size);
241 break;
242 case NETLIST_REGIONID_CTXSW_REG_BASE_INDEX:
243 g->gr.ctx_vars.regs_base_index = *src;
244 gk20a_dbg_info("NETLIST_REGIONID_CTXSW_REG_BASE_INDEX : %d",
245 g->gr.ctx_vars.regs_base_index);
246 break;
247 case NETLIST_REGIONID_MAJORV:
248 major_v = *src;
249 gk20a_dbg_info("NETLIST_REGIONID_MAJORV : %d",
250 major_v);
251 break;
252 case NETLIST_REGIONID_NETLIST_NUM:
253 netlist_num = *src;
254 gk20a_dbg_info("NETLIST_REGIONID_NETLIST_NUM : %d",
255 netlist_num);
256 break;
257 case NETLIST_REGIONID_CTXREG_PMPPC:
258 gk20a_dbg_info("NETLIST_REGIONID_CTXREG_PMPPC");
259 err = gr_gk20a_alloc_load_netlist_aiv(g,
260 src, size, &g->gr.ctx_vars.ctxsw_regs.pm_ppc);
261 if (err)
262 goto clean_up;
263 break;
264 case NETLIST_REGIONID_NVPERF_CTXREG_SYS:
265 gk20a_dbg_info("NETLIST_REGIONID_NVPERF_CTXREG_SYS");
266 err = gr_gk20a_alloc_load_netlist_aiv(g,
267 src, size, &g->gr.ctx_vars.ctxsw_regs.perf_sys);
268 if (err)
269 goto clean_up;
270 break;
271 case NETLIST_REGIONID_NVPERF_FBP_CTXREGS:
272 gk20a_dbg_info("NETLIST_REGIONID_NVPERF_FBP_CTXREGS");
273 err = gr_gk20a_alloc_load_netlist_aiv(g,
274 src, size, &g->gr.ctx_vars.ctxsw_regs.fbp);
275 if (err)
276 goto clean_up;
277 break;
278 case NETLIST_REGIONID_NVPERF_CTXREG_GPC:
279 gk20a_dbg_info("NETLIST_REGIONID_NVPERF_CTXREG_GPC");
280 err = gr_gk20a_alloc_load_netlist_aiv(g,
281 src, size, &g->gr.ctx_vars.ctxsw_regs.perf_gpc);
282 if (err)
283 goto clean_up;
284 break;
285 case NETLIST_REGIONID_NVPERF_FBP_ROUTER:
286 gk20a_dbg_info("NETLIST_REGIONID_NVPERF_FBP_ROUTER");
287 err = gr_gk20a_alloc_load_netlist_aiv(g,
288 src, size, &g->gr.ctx_vars.ctxsw_regs.fbp_router);
289 if (err)
290 goto clean_up;
291 break;
292 case NETLIST_REGIONID_NVPERF_GPC_ROUTER:
293 gk20a_dbg_info("NETLIST_REGIONID_NVPERF_GPC_ROUTER");
294 err = gr_gk20a_alloc_load_netlist_aiv(g,
295 src, size, &g->gr.ctx_vars.ctxsw_regs.gpc_router);
296 if (err)
297 goto clean_up;
298 break;
299 case NETLIST_REGIONID_CTXREG_PMLTC:
300 gk20a_dbg_info("NETLIST_REGIONID_CTXREG_PMLTC");
301 err = gr_gk20a_alloc_load_netlist_aiv(g,
302 src, size, &g->gr.ctx_vars.ctxsw_regs.pm_ltc);
303 if (err)
304 goto clean_up;
305 break;
306 case NETLIST_REGIONID_CTXREG_PMFBPA:
307 gk20a_dbg_info("NETLIST_REGIONID_CTXREG_PMFBPA");
308 err = gr_gk20a_alloc_load_netlist_aiv(g,
309 src, size, &g->gr.ctx_vars.ctxsw_regs.pm_fbpa);
310 if (err)
311 goto clean_up;
312 break;
313 case NETLIST_REGIONID_NVPERF_SYS_ROUTER:
314 gk20a_dbg_info("NETLIST_REGIONID_NVPERF_SYS_ROUTER");
315 err = gr_gk20a_alloc_load_netlist_aiv(g,
316 src, size, &g->gr.ctx_vars.ctxsw_regs.perf_sys_router);
317 if (err)
318 goto clean_up;
319 break;
320 case NETLIST_REGIONID_NVPERF_PMA:
321 gk20a_dbg_info("NETLIST_REGIONID_NVPERF_PMA");
322 err = gr_gk20a_alloc_load_netlist_aiv(g,
323 src, size, &g->gr.ctx_vars.ctxsw_regs.perf_pma);
324 if (err)
325 goto clean_up;
326 break;
327 case NETLIST_REGIONID_CTXREG_PMROP:
328 gk20a_dbg_info("NETLIST_REGIONID_CTXREG_PMROP");
329 err = gr_gk20a_alloc_load_netlist_aiv(g,
330 src, size, &g->gr.ctx_vars.ctxsw_regs.pm_rop);
331 if (err)
332 goto clean_up;
333 break;
334 case NETLIST_REGIONID_CTXREG_PMUCGPC:
335 gk20a_dbg_info("NETLIST_REGIONID_CTXREG_PMUCGPC");
336 err = gr_gk20a_alloc_load_netlist_aiv(g,
337 src, size, &g->gr.ctx_vars.ctxsw_regs.pm_ucgpc);
338 if (err)
339 goto clean_up;
340 break;
341 case NETLIST_REGIONID_CTXREG_ETPC:
342 gk20a_dbg_info("NETLIST_REGIONID_CTXREG_ETPC");
343 err = gr_gk20a_alloc_load_netlist_aiv(g,
344 src, size, &g->gr.ctx_vars.ctxsw_regs.etpc);
345 if (err)
346 goto clean_up;
347 break;
348
349 default:
350 gk20a_dbg_info("unrecognized region %d skipped", i);
351 break;
352 }
353 }
354
355 if (net != NETLIST_FINAL && major_v != major_v_hw) {
356 gk20a_dbg_info("skip %s: major_v 0x%08x doesn't match hw 0x%08x",
357 name, major_v, major_v_hw);
358 goto clean_up;
359 }
360
361 g->gr.ctx_vars.valid = true;
362 g->gr.netlist = net;
363
364 nvgpu_release_firmware(g, netlist_fw);
365 gk20a_dbg_fn("done");
366 goto done;
367
368clean_up:
369 g->gr.ctx_vars.valid = false;
370 nvgpu_kfree(g, g->gr.ctx_vars.ucode.fecs.inst.l);
371 nvgpu_kfree(g, g->gr.ctx_vars.ucode.fecs.data.l);
372 nvgpu_kfree(g, g->gr.ctx_vars.ucode.gpccs.inst.l);
373 nvgpu_kfree(g, g->gr.ctx_vars.ucode.gpccs.data.l);
374 nvgpu_kfree(g, g->gr.ctx_vars.sw_bundle_init.l);
375 nvgpu_kfree(g, g->gr.ctx_vars.sw_method_init.l);
376 nvgpu_kfree(g, g->gr.ctx_vars.sw_ctx_load.l);
377 nvgpu_kfree(g, g->gr.ctx_vars.sw_non_ctx_load.l);
378 nvgpu_kfree(g, g->gr.ctx_vars.sw_veid_bundle_init.l);
379 nvgpu_kfree(g, g->gr.ctx_vars.ctxsw_regs.sys.l);
380 nvgpu_kfree(g, g->gr.ctx_vars.ctxsw_regs.gpc.l);
381 nvgpu_kfree(g, g->gr.ctx_vars.ctxsw_regs.tpc.l);
382 nvgpu_kfree(g, g->gr.ctx_vars.ctxsw_regs.zcull_gpc.l);
383 nvgpu_kfree(g, g->gr.ctx_vars.ctxsw_regs.ppc.l);
384 nvgpu_kfree(g, g->gr.ctx_vars.ctxsw_regs.pm_sys.l);
385 nvgpu_kfree(g, g->gr.ctx_vars.ctxsw_regs.pm_gpc.l);
386 nvgpu_kfree(g, g->gr.ctx_vars.ctxsw_regs.pm_tpc.l);
387 nvgpu_kfree(g, g->gr.ctx_vars.ctxsw_regs.pm_ppc.l);
388 nvgpu_kfree(g, g->gr.ctx_vars.ctxsw_regs.perf_sys.l);
389 nvgpu_kfree(g, g->gr.ctx_vars.ctxsw_regs.fbp.l);
390 nvgpu_kfree(g, g->gr.ctx_vars.ctxsw_regs.perf_gpc.l);
391 nvgpu_kfree(g, g->gr.ctx_vars.ctxsw_regs.fbp_router.l);
392 nvgpu_kfree(g, g->gr.ctx_vars.ctxsw_regs.gpc_router.l);
393 nvgpu_kfree(g, g->gr.ctx_vars.ctxsw_regs.pm_ltc.l);
394 nvgpu_kfree(g, g->gr.ctx_vars.ctxsw_regs.pm_fbpa.l);
395 nvgpu_kfree(g, g->gr.ctx_vars.ctxsw_regs.perf_sys_router.l);
396 nvgpu_kfree(g, g->gr.ctx_vars.ctxsw_regs.perf_pma.l);
397 nvgpu_kfree(g, g->gr.ctx_vars.ctxsw_regs.pm_rop.l);
398 nvgpu_kfree(g, g->gr.ctx_vars.ctxsw_regs.pm_ucgpc.l);
399 nvgpu_kfree(g, g->gr.ctx_vars.ctxsw_regs.etpc.l);
400 nvgpu_release_firmware(g, netlist_fw);
401 err = -ENOENT;
402 }
403
404done:
405 if (g->gr.ctx_vars.valid) {
406 gk20a_dbg_info("netlist image %s loaded", name);
407 return 0;
408 } else {
409 nvgpu_err(g, "failed to load netlist image!!");
410 return err;
411 }
412}
413
414int gr_gk20a_init_ctx_vars(struct gk20a *g, struct gr_gk20a *gr)
415{
416 if (nvgpu_is_enabled(g, NVGPU_IS_FMODEL))
417 return gr_gk20a_init_ctx_vars_sim(g, gr);
418 else
419 return gr_gk20a_init_ctx_vars_fw(g, gr);
420}
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