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Diffstat (limited to 'drivers/gpu/nvgpu/gk20a/gk20a.h')
-rw-r--r--drivers/gpu/nvgpu/gk20a/gk20a.h10
1 files changed, 9 insertions, 1 deletions
diff --git a/drivers/gpu/nvgpu/gk20a/gk20a.h b/drivers/gpu/nvgpu/gk20a/gk20a.h
index 192f4c3e..5a888303 100644
--- a/drivers/gpu/nvgpu/gk20a/gk20a.h
+++ b/drivers/gpu/nvgpu/gk20a/gk20a.h
@@ -68,7 +68,6 @@ struct nvgpu_ctxsw_trace_filter;
68#include "ce2_gk20a.h" 68#include "ce2_gk20a.h"
69#include "fifo_gk20a.h" 69#include "fifo_gk20a.h"
70#include "tsg_gk20a.h" 70#include "tsg_gk20a.h"
71#include "pmu_gk20a.h"
72#include "clk/clk.h" 71#include "clk/clk.h"
73#include "perf/perf.h" 72#include "perf/perf.h"
74#include "pmgr/pmgr.h" 73#include "pmgr/pmgr.h"
@@ -1025,6 +1024,15 @@ struct gpu_ops {
1025 u32 id, u32 *token); 1024 u32 id, u32 *token);
1026 int (*pmu_mutex_release)(struct nvgpu_pmu *pmu, 1025 int (*pmu_mutex_release)(struct nvgpu_pmu *pmu,
1027 u32 id, u32 *token); 1026 u32 id, u32 *token);
1027 bool (*pmu_is_interrupted)(struct nvgpu_pmu *pmu);
1028 void (*pmu_isr)(struct gk20a *g);
1029 void (*pmu_init_perfmon_counter)(struct gk20a *g);
1030 void (*pmu_pg_idle_counter_config)(struct gk20a *g, u32 pg_engine_id);
1031 u32 (*pmu_read_idle_counter)(struct gk20a *g, u32 counter_id);
1032 void (*pmu_reset_idle_counter)(struct gk20a *g, u32 counter_id);
1033 void (*pmu_dump_elpg_stats)(struct nvgpu_pmu *pmu);
1034 void (*pmu_dump_falcon_stats)(struct nvgpu_pmu *pmu);
1035 void (*pmu_enable_irq)(struct nvgpu_pmu *pmu, bool enable);
1028 int (*init_wpr_region)(struct gk20a *g); 1036 int (*init_wpr_region)(struct gk20a *g);
1029 int (*load_lsfalcon_ucode)(struct gk20a *g, u32 falconidmask); 1037 int (*load_lsfalcon_ucode)(struct gk20a *g, u32 falconidmask);
1030 void (*write_dmatrfbase)(struct gk20a *g, u32 addr); 1038 void (*write_dmatrfbase)(struct gk20a *g, u32 addr);