diff options
Diffstat (limited to 'drivers/gpu/nvgpu/gk20a/gk20a.h')
-rw-r--r-- | drivers/gpu/nvgpu/gk20a/gk20a.h | 49 |
1 files changed, 42 insertions, 7 deletions
diff --git a/drivers/gpu/nvgpu/gk20a/gk20a.h b/drivers/gpu/nvgpu/gk20a/gk20a.h index 340f358a..8a1f82bc 100644 --- a/drivers/gpu/nvgpu/gk20a/gk20a.h +++ b/drivers/gpu/nvgpu/gk20a/gk20a.h | |||
@@ -25,6 +25,8 @@ struct channel_gk20a; | |||
25 | struct gr_gk20a; | 25 | struct gr_gk20a; |
26 | struct sim_gk20a; | 26 | struct sim_gk20a; |
27 | struct gk20a_ctxsw_ucode_segments; | 27 | struct gk20a_ctxsw_ucode_segments; |
28 | struct gk20a_fecs_trace; | ||
29 | struct gk20a_ctxsw_trace; | ||
28 | struct acr_gm20b; | 30 | struct acr_gm20b; |
29 | 31 | ||
30 | #include <linux/sched.h> | 32 | #include <linux/sched.h> |
@@ -54,8 +56,6 @@ struct acr_gm20b; | |||
54 | 32 ns is the resolution of ptimer. */ | 56 | 32 ns is the resolution of ptimer. */ |
55 | #define PTIMER_REF_FREQ_HZ 31250000 | 57 | #define PTIMER_REF_FREQ_HZ 31250000 |
56 | 58 | ||
57 | #define MAX_INTERLEAVED_CHANNELS 32 | ||
58 | |||
59 | struct cooling_device_gk20a { | 59 | struct cooling_device_gk20a { |
60 | struct thermal_cooling_device *gk20a_cooling_dev; | 60 | struct thermal_cooling_device *gk20a_cooling_dev; |
61 | unsigned int gk20a_freq_state; | 61 | unsigned int gk20a_freq_state; |
@@ -236,6 +236,7 @@ struct gpu_ops { | |||
236 | void (*slcg_therm_load_gating_prod)(struct gk20a *g, bool prod); | 236 | void (*slcg_therm_load_gating_prod)(struct gk20a *g, bool prod); |
237 | void (*slcg_xbar_load_gating_prod)(struct gk20a *g, bool prod); | 237 | void (*slcg_xbar_load_gating_prod)(struct gk20a *g, bool prod); |
238 | void (*blcg_bus_load_gating_prod)(struct gk20a *g, bool prod); | 238 | void (*blcg_bus_load_gating_prod)(struct gk20a *g, bool prod); |
239 | void (*blcg_ce_load_gating_prod)(struct gk20a *g, bool prod); | ||
239 | void (*blcg_ctxsw_firmware_load_gating_prod)(struct gk20a *g, bool prod); | 240 | void (*blcg_ctxsw_firmware_load_gating_prod)(struct gk20a *g, bool prod); |
240 | void (*blcg_fb_load_gating_prod)(struct gk20a *g, bool prod); | 241 | void (*blcg_fb_load_gating_prod)(struct gk20a *g, bool prod); |
241 | void (*blcg_fifo_load_gating_prod)(struct gk20a *g, bool prod); | 242 | void (*blcg_fifo_load_gating_prod)(struct gk20a *g, bool prod); |
@@ -267,6 +268,11 @@ struct gpu_ops { | |||
267 | u32 (*get_num_fifos)(struct gk20a *g); | 268 | u32 (*get_num_fifos)(struct gk20a *g); |
268 | u32 (*get_pbdma_signature)(struct gk20a *g); | 269 | u32 (*get_pbdma_signature)(struct gk20a *g); |
269 | int (*channel_set_priority)(struct channel_gk20a *ch, u32 priority); | 270 | int (*channel_set_priority)(struct channel_gk20a *ch, u32 priority); |
271 | int (*set_runlist_interleave)(struct gk20a *g, u32 id, | ||
272 | bool is_tsg, u32 runlist_id, | ||
273 | u32 new_level); | ||
274 | int (*channel_set_timeslice)(struct channel_gk20a *ch, | ||
275 | u32 timeslice); | ||
270 | } fifo; | 276 | } fifo; |
271 | struct pmu_v { | 277 | struct pmu_v { |
272 | /*used for change of enum zbc update cmd id from ver 0 to ver1*/ | 278 | /*used for change of enum zbc update cmd id from ver 0 to ver1*/ |
@@ -369,6 +375,19 @@ struct gpu_ops { | |||
369 | bool use_dma_for_fw_bootstrap; | 375 | bool use_dma_for_fw_bootstrap; |
370 | } gr_ctx; | 376 | } gr_ctx; |
371 | struct { | 377 | struct { |
378 | int (*init)(struct gk20a *g); | ||
379 | int (*max_entries)(struct gk20a *, | ||
380 | struct nvgpu_ctxsw_trace_filter *); | ||
381 | int (*flush)(struct gk20a *g); | ||
382 | int (*poll)(struct gk20a *g); | ||
383 | int (*enable)(struct gk20a *g); | ||
384 | int (*disable)(struct gk20a *g); | ||
385 | int (*reset)(struct gk20a *g); | ||
386 | int (*bind_channel)(struct gk20a *, struct channel_gk20a *); | ||
387 | int (*unbind_channel)(struct gk20a *, struct channel_gk20a *); | ||
388 | int (*deinit)(struct gk20a *g); | ||
389 | } fecs_trace; | ||
390 | struct { | ||
372 | bool (*support_sparse)(struct gk20a *g); | 391 | bool (*support_sparse)(struct gk20a *g); |
373 | bool (*is_debug_mode_enabled)(struct gk20a *g); | 392 | bool (*is_debug_mode_enabled)(struct gk20a *g); |
374 | void (*set_debug_mode)(struct gk20a *g, bool enable); | 393 | void (*set_debug_mode)(struct gk20a *g, bool enable); |
@@ -535,10 +554,7 @@ struct gk20a { | |||
535 | u32 timeslice_low_priority_us; | 554 | u32 timeslice_low_priority_us; |
536 | u32 timeslice_medium_priority_us; | 555 | u32 timeslice_medium_priority_us; |
537 | u32 timeslice_high_priority_us; | 556 | u32 timeslice_high_priority_us; |
538 | u32 interleave_high_priority; | 557 | u32 runlist_interleave; |
539 | |||
540 | struct mutex interleave_lock; | ||
541 | u32 num_interleaved_channels; | ||
542 | 558 | ||
543 | bool slcg_enabled; | 559 | bool slcg_enabled; |
544 | bool blcg_enabled; | 560 | bool blcg_enabled; |
@@ -563,7 +579,7 @@ struct gk20a { | |||
563 | struct dentry *debugfs_timeslice_low_priority_us; | 579 | struct dentry *debugfs_timeslice_low_priority_us; |
564 | struct dentry *debugfs_timeslice_medium_priority_us; | 580 | struct dentry *debugfs_timeslice_medium_priority_us; |
565 | struct dentry *debugfs_timeslice_high_priority_us; | 581 | struct dentry *debugfs_timeslice_high_priority_us; |
566 | struct dentry *debugfs_interleave_high_priority; | 582 | struct dentry *debugfs_runlist_interleave; |
567 | 583 | ||
568 | #endif | 584 | #endif |
569 | struct gk20a_ctxsw_ucode_info ctxsw_ucode_info; | 585 | struct gk20a_ctxsw_ucode_info ctxsw_ucode_info; |
@@ -575,6 +591,14 @@ struct gk20a { | |||
575 | int dbg_powergating_disabled_refcount; /*refcount for pg disable */ | 591 | int dbg_powergating_disabled_refcount; /*refcount for pg disable */ |
576 | int dbg_timeout_disabled_refcount; /*refcount for timeout disable */ | 592 | int dbg_timeout_disabled_refcount; /*refcount for timeout disable */ |
577 | 593 | ||
594 | /* | ||
595 | * When set subsequent VMAs will separate fixed and non-fixed | ||
596 | * allocations. This avoids conflicts with fixed and non-fixed allocs | ||
597 | * for some tests. The value in separate_fixed_allocs is used to | ||
598 | * determine the split boundary. | ||
599 | */ | ||
600 | u64 separate_fixed_allocs; | ||
601 | |||
578 | void (*remove_support)(struct platform_device *); | 602 | void (*remove_support)(struct platform_device *); |
579 | 603 | ||
580 | u64 pg_ingating_time_us; | 604 | u64 pg_ingating_time_us; |
@@ -612,6 +636,11 @@ struct gk20a { | |||
612 | struct device *node; | 636 | struct device *node; |
613 | } tsg; | 637 | } tsg; |
614 | 638 | ||
639 | struct { | ||
640 | struct cdev cdev; | ||
641 | struct device *node; | ||
642 | } ctxsw; | ||
643 | |||
615 | struct mutex client_lock; | 644 | struct mutex client_lock; |
616 | int client_refcount; /* open channels and ctrl nodes */ | 645 | int client_refcount; /* open channels and ctrl nodes */ |
617 | 646 | ||
@@ -638,6 +667,9 @@ struct gk20a { | |||
638 | 667 | ||
639 | struct gk20a_scale_profile *scale_profile; | 668 | struct gk20a_scale_profile *scale_profile; |
640 | 669 | ||
670 | struct gk20a_ctxsw_trace *ctxsw_trace; | ||
671 | struct gk20a_fecs_trace *fecs_trace; | ||
672 | |||
641 | struct device_dma_parameters dma_parms; | 673 | struct device_dma_parameters dma_parms; |
642 | 674 | ||
643 | struct gk20a_cde_app cde_app; | 675 | struct gk20a_cde_app cde_app; |
@@ -715,6 +747,7 @@ enum gk20a_dbg_categories { | |||
715 | gpu_dbg_gpu_dbg = BIT(9), /* gpu debugger/profiler */ | 747 | gpu_dbg_gpu_dbg = BIT(9), /* gpu debugger/profiler */ |
716 | gpu_dbg_cde = BIT(10), /* cde info messages */ | 748 | gpu_dbg_cde = BIT(10), /* cde info messages */ |
717 | gpu_dbg_cde_ctx = BIT(11), /* cde context usage messages */ | 749 | gpu_dbg_cde_ctx = BIT(11), /* cde context usage messages */ |
750 | gpu_dbg_ctxsw = BIT(12), /* ctxsw tracing */ | ||
718 | gpu_dbg_mem = BIT(31), /* memory accesses, very verbose */ | 751 | gpu_dbg_mem = BIT(31), /* memory accesses, very verbose */ |
719 | }; | 752 | }; |
720 | 753 | ||
@@ -961,4 +994,6 @@ static inline u32 scale_ptimer(u32 timeout , u32 scale10x) | |||
961 | else | 994 | else |
962 | return (timeout * 10) / scale10x; | 995 | return (timeout * 10) / scale10x; |
963 | } | 996 | } |
997 | |||
998 | u64 gk20a_read_ptimer(struct gk20a *g); | ||
964 | #endif /* GK20A_H */ | 999 | #endif /* GK20A_H */ |