1 files changed, 42 insertions, 7 deletions

diff --git a/drivers/gpu/nvgpu/gk20a/gk20a.h b/drivers/gpu/nvgpu/gk20a/gk20a.h
index 340f358a..8a1f82bc 100644
--- a/drivers/gpu/nvgpu/gk20a/gk20a.h
+++ b/drivers/gpu/nvgpu/gk20a/gk20a.h
@@ -25,6 +25,8 @@ struct channel_gk20a;
 struct gr_gk20a;
 struct sim_gk20a;
 struct gk20a_ctxsw_ucode_segments;
+struct gk20a_fecs_trace;
+struct gk20a_ctxsw_trace;
 struct acr_gm20b;
 
 #include <linux/sched.h>
@@ -54,8 +56,6 @@ struct acr_gm20b;
     32 ns is the resolution of ptimer. */
 #define PTIMER_REF_FREQ_HZ                      31250000
 
-#define MAX_INTERLEAVED_CHANNELS                32
-
 struct cooling_device_gk20a {
         struct thermal_cooling_device *gk20a_cooling_dev;
         unsigned int gk20a_freq_state;
@@ -236,6 +236,7 @@ struct gpu_ops {
                 void (*slcg_therm_load_gating_prod)(struct gk20a *g, bool prod);
                 void (*slcg_xbar_load_gating_prod)(struct gk20a *g, bool prod);
                 void (*blcg_bus_load_gating_prod)(struct gk20a *g, bool prod);
+                void (*blcg_ce_load_gating_prod)(struct gk20a *g, bool prod);
                 void (*blcg_ctxsw_firmware_load_gating_prod)(struct gk20a *g, bool prod);
                 void (*blcg_fb_load_gating_prod)(struct gk20a *g, bool prod);
                 void (*blcg_fifo_load_gating_prod)(struct gk20a *g, bool prod);
@@ -267,6 +268,11 @@ struct gpu_ops {
                 u32 (*get_num_fifos)(struct gk20a *g);
                 u32 (*get_pbdma_signature)(struct gk20a *g);
                 int (*channel_set_priority)(struct channel_gk20a *ch, u32 priority);
+                int (*set_runlist_interleave)(struct gk20a *g, u32 id,
+                                        bool is_tsg, u32 runlist_id,
+                                        u32 new_level);
+                int (*channel_set_timeslice)(struct channel_gk20a *ch,
+                                        u32 timeslice);
         } fifo;
         struct pmu_v {
                 /*used for change of enum zbc update cmd id from ver 0 to ver1*/
@@ -369,6 +375,19 @@ struct gpu_ops {
                 bool use_dma_for_fw_bootstrap;
         } gr_ctx;
         struct {
+                int (*init)(struct gk20a *g);
+                int (*max_entries)(struct gk20a *,
+                        struct nvgpu_ctxsw_trace_filter *);
+                int (*flush)(struct gk20a *g);
+                int (*poll)(struct gk20a *g);
+                int (*enable)(struct gk20a *g);
+                int (*disable)(struct gk20a *g);
+                int (*reset)(struct gk20a *g);
+                int (*bind_channel)(struct gk20a *, struct channel_gk20a *);
+                int (*unbind_channel)(struct gk20a *, struct channel_gk20a *);
+                int (*deinit)(struct gk20a *g);
+        } fecs_trace;
+        struct {
                 bool (*support_sparse)(struct gk20a *g);
                 bool (*is_debug_mode_enabled)(struct gk20a *g);
                 void (*set_debug_mode)(struct gk20a *g, bool enable);
@@ -535,10 +554,7 @@ struct gk20a {
         u32 timeslice_low_priority_us;
         u32 timeslice_medium_priority_us;
         u32 timeslice_high_priority_us;
-        u32 interleave_high_priority;
-
-        struct mutex interleave_lock;
-        u32 num_interleaved_channels;
+        u32 runlist_interleave;
 
         bool slcg_enabled;
         bool blcg_enabled;
@@ -563,7 +579,7 @@ struct gk20a {
         struct dentry *debugfs_timeslice_low_priority_us;
         struct dentry *debugfs_timeslice_medium_priority_us;
         struct dentry *debugfs_timeslice_high_priority_us;
-        struct dentry *debugfs_interleave_high_priority;
+        struct dentry *debugfs_runlist_interleave;
 
 #endif
         struct gk20a_ctxsw_ucode_info ctxsw_ucode_info;
@@ -575,6 +591,14 @@ struct gk20a {
         int dbg_powergating_disabled_refcount; /*refcount for pg disable */
         int dbg_timeout_disabled_refcount; /*refcount for timeout disable */
 
+        /*
+         * When set subsequent VMAs will separate fixed and non-fixed
+         * allocations. This avoids conflicts with fixed and non-fixed allocs
+         * for some tests. The value in separate_fixed_allocs is used to
+         * determine the split boundary.
+         */
+        u64 separate_fixed_allocs;
+
         void (*remove_support)(struct platform_device *);
 
         u64 pg_ingating_time_us;
@@ -612,6 +636,11 @@ struct gk20a {
                 struct device *node;
         } tsg;
 
+        struct {
+                struct cdev cdev;
+                struct device *node;
+        } ctxsw;
+
         struct mutex client_lock;
         int client_refcount; /* open channels and ctrl nodes */
 
@@ -638,6 +667,9 @@ struct gk20a {
 
         struct gk20a_scale_profile *scale_profile;
 
+        struct gk20a_ctxsw_trace *ctxsw_trace;
+        struct gk20a_fecs_trace *fecs_trace;
+
         struct device_dma_parameters dma_parms;
 
         struct gk20a_cde_app cde_app;
@@ -715,6 +747,7 @@ enum gk20a_dbg_categories {
         gpu_dbg_gpu_dbg = BIT(9),  /* gpu debugger/profiler */
         gpu_dbg_cde     = BIT(10), /* cde info messages */
         gpu_dbg_cde_ctx = BIT(11), /* cde context usage messages */
+        gpu_dbg_ctxsw   = BIT(12), /* ctxsw tracing */
         gpu_dbg_mem     = BIT(31), /* memory accesses, very verbose */
 };
 
@@ -961,4 +994,6 @@ static inline u32 scale_ptimer(u32 timeout , u32 scale10x)
         else
                 return (timeout * 10) / scale10x;
 }
+
+u64 gk20a_read_ptimer(struct gk20a *g);
 #endif /* GK20A_H */