diff options
Diffstat (limited to 'drivers/gpu/nvgpu/gk20a/gk20a.h')
-rw-r--r-- | drivers/gpu/nvgpu/gk20a/gk20a.h | 49 |
1 files changed, 49 insertions, 0 deletions
diff --git a/drivers/gpu/nvgpu/gk20a/gk20a.h b/drivers/gpu/nvgpu/gk20a/gk20a.h index a1080f0b..b813541a 100644 --- a/drivers/gpu/nvgpu/gk20a/gk20a.h +++ b/drivers/gpu/nvgpu/gk20a/gk20a.h | |||
@@ -131,6 +131,16 @@ struct gpu_ops { | |||
131 | u32 reg_offset); | 131 | u32 reg_offset); |
132 | int (*load_ctxsw_ucode)(struct gk20a *g); | 132 | int (*load_ctxsw_ucode)(struct gk20a *g); |
133 | u32 (*get_gpc_tpc_mask)(struct gk20a *g, u32 gpc_index); | 133 | u32 (*get_gpc_tpc_mask)(struct gk20a *g, u32 gpc_index); |
134 | void (*free_channel_ctx)(struct channel_gk20a *c); | ||
135 | int (*alloc_obj_ctx)(struct channel_gk20a *c, | ||
136 | struct nvhost_alloc_obj_ctx_args *args); | ||
137 | int (*free_obj_ctx)(struct channel_gk20a *c, | ||
138 | struct nvhost_free_obj_ctx_args *args); | ||
139 | int (*bind_ctxsw_zcull)(struct gk20a *g, struct gr_gk20a *gr, | ||
140 | struct channel_gk20a *c, u64 zcull_va, | ||
141 | u32 mode); | ||
142 | int (*get_zcull_info)(struct gk20a *g, struct gr_gk20a *gr, | ||
143 | struct gr_zcull_info *zcull_params); | ||
134 | } gr; | 144 | } gr; |
135 | const char *name; | 145 | const char *name; |
136 | struct { | 146 | struct { |
@@ -148,9 +158,20 @@ struct gpu_ops { | |||
148 | } clock_gating; | 158 | } clock_gating; |
149 | struct { | 159 | struct { |
150 | void (*bind_channel)(struct channel_gk20a *ch_gk20a); | 160 | void (*bind_channel)(struct channel_gk20a *ch_gk20a); |
161 | void (*unbind_channel)(struct channel_gk20a *ch_gk20a); | ||
162 | void (*disable_channel)(struct channel_gk20a *ch); | ||
163 | int (*alloc_inst)(struct gk20a *g, struct channel_gk20a *ch); | ||
164 | void (*free_inst)(struct gk20a *g, struct channel_gk20a *ch); | ||
165 | int (*setup_ramfc)(struct channel_gk20a *c, u64 gpfifo_base, | ||
166 | u32 gpfifo_entries); | ||
167 | int (*preempt_channel)(struct gk20a *g, u32 hw_chid); | ||
168 | int (*update_runlist)(struct gk20a *g, u32 runlist_id, | ||
169 | u32 hw_chid, bool add, | ||
170 | bool wait_for_finish); | ||
151 | void (*trigger_mmu_fault)(struct gk20a *g, | 171 | void (*trigger_mmu_fault)(struct gk20a *g, |
152 | unsigned long engine_ids); | 172 | unsigned long engine_ids); |
153 | void (*apply_pb_timeout)(struct gk20a *g); | 173 | void (*apply_pb_timeout)(struct gk20a *g); |
174 | int (*wait_engine_idle)(struct gk20a *g); | ||
154 | } fifo; | 175 | } fifo; |
155 | struct pmu_v { | 176 | struct pmu_v { |
156 | /*used for change of enum zbc update cmd id from ver 0 to ver1*/ | 177 | /*used for change of enum zbc update cmd id from ver 0 to ver1*/ |
@@ -241,6 +262,31 @@ struct gpu_ops { | |||
241 | void (*clear_sparse)(struct vm_gk20a *vm, u64 vaddr, | 262 | void (*clear_sparse)(struct vm_gk20a *vm, u64 vaddr, |
242 | u64 size, u32 pgsz_idx); | 263 | u64 size, u32 pgsz_idx); |
243 | bool (*is_debug_mode_enabled)(struct gk20a *g); | 264 | bool (*is_debug_mode_enabled)(struct gk20a *g); |
265 | u64 (*gmmu_map)(struct vm_gk20a *vm, | ||
266 | u64 map_offset, | ||
267 | struct sg_table *sgt, | ||
268 | u64 buffer_offset, | ||
269 | u64 size, | ||
270 | int pgsz_idx, | ||
271 | u8 kind_v, | ||
272 | u32 ctag_offset, | ||
273 | u32 flags, | ||
274 | int rw_flag, | ||
275 | bool clear_ctags); | ||
276 | void (*gmmu_unmap)(struct vm_gk20a *vm, | ||
277 | u64 vaddr, | ||
278 | u64 size, | ||
279 | int pgsz_idx, | ||
280 | bool va_allocated, | ||
281 | int rw_flag); | ||
282 | void (*vm_remove)(struct vm_gk20a *vm); | ||
283 | int (*vm_alloc_share)(struct gk20a_as_share *as_share); | ||
284 | int (*vm_bind_channel)(struct gk20a_as_share *as_share, | ||
285 | struct channel_gk20a *ch); | ||
286 | int (*fb_flush)(struct gk20a *g); | ||
287 | void (*l2_invalidate)(struct gk20a *g); | ||
288 | void (*l2_flush)(struct gk20a *g, bool invalidate); | ||
289 | void (*tlb_invalidate)(struct vm_gk20a *vm); | ||
244 | } mm; | 290 | } mm; |
245 | struct { | 291 | struct { |
246 | int (*prepare_ucode)(struct gk20a *g); | 292 | int (*prepare_ucode)(struct gk20a *g); |
@@ -648,4 +694,7 @@ gk20a_request_firmware(struct gk20a *g, const char *fw_name); | |||
648 | 694 | ||
649 | int gk20a_init_gpu_characteristics(struct gk20a *g); | 695 | int gk20a_init_gpu_characteristics(struct gk20a *g); |
650 | 696 | ||
697 | int gk20a_user_init(struct platform_device *dev); | ||
698 | void gk20a_user_deinit(struct platform_device *dev); | ||
699 | |||
651 | #endif /* _NVHOST_GK20A_H_ */ | 700 | #endif /* _NVHOST_GK20A_H_ */ |