diff options
Diffstat (limited to 'drivers/gpu/nvgpu/gk20a/gk20a.c')
-rw-r--r-- | drivers/gpu/nvgpu/gk20a/gk20a.c | 53 |
1 files changed, 4 insertions, 49 deletions
diff --git a/drivers/gpu/nvgpu/gk20a/gk20a.c b/drivers/gpu/nvgpu/gk20a/gk20a.c index 694f0e93..e77986be 100644 --- a/drivers/gpu/nvgpu/gk20a/gk20a.c +++ b/drivers/gpu/nvgpu/gk20a/gk20a.c | |||
@@ -54,6 +54,7 @@ | |||
54 | #include "gk20a_scale.h" | 54 | #include "gk20a_scale.h" |
55 | #include "ctxsw_trace_gk20a.h" | 55 | #include "ctxsw_trace_gk20a.h" |
56 | #include "dbg_gpu_gk20a.h" | 56 | #include "dbg_gpu_gk20a.h" |
57 | #include "mc_gk20a.h" | ||
57 | #include "hal.h" | 58 | #include "hal.h" |
58 | #include "vgpu/vgpu.h" | 59 | #include "vgpu/vgpu.h" |
59 | #include "pci.h" | 60 | #include "pci.h" |
@@ -70,7 +71,6 @@ | |||
70 | #include "nvgpu_gpuid_t19x.h" | 71 | #include "nvgpu_gpuid_t19x.h" |
71 | #endif | 72 | #endif |
72 | 73 | ||
73 | #include <nvgpu/hw/gk20a/hw_mc_gk20a.h> | ||
74 | #include <nvgpu/hw/gk20a/hw_top_gk20a.h> | 74 | #include <nvgpu/hw/gk20a/hw_top_gk20a.h> |
75 | #include <nvgpu/hw/gk20a/hw_ltc_gk20a.h> | 75 | #include <nvgpu/hw/gk20a/hw_ltc_gk20a.h> |
76 | #include <nvgpu/hw/gk20a/hw_fb_gk20a.h> | 76 | #include <nvgpu/hw/gk20a/hw_fb_gk20a.h> |
@@ -263,7 +263,7 @@ static const struct file_operations gk20a_sched_ops = { | |||
263 | 263 | ||
264 | void __nvgpu_check_gpu_state(struct gk20a *g) | 264 | void __nvgpu_check_gpu_state(struct gk20a *g) |
265 | { | 265 | { |
266 | u32 boot_0 = readl(g->regs + mc_boot_0_r()); | 266 | u32 boot_0 = g->ops.mc.boot_0(g, NULL, NULL, NULL); |
267 | 267 | ||
268 | if (boot_0 == 0xffffffff) { | 268 | if (boot_0 == 0xffffffff) { |
269 | pr_err("nvgpu: GPU has disappeared from bus!!\n"); | 269 | pr_err("nvgpu: GPU has disappeared from bus!!\n"); |
@@ -474,18 +474,12 @@ done: | |||
474 | static int gk20a_detect_chip(struct gk20a *g) | 474 | static int gk20a_detect_chip(struct gk20a *g) |
475 | { | 475 | { |
476 | struct nvgpu_gpu_characteristics *gpu = &g->gpu_characteristics; | 476 | struct nvgpu_gpu_characteristics *gpu = &g->gpu_characteristics; |
477 | u32 mc_boot_0_value; | 477 | u32 val; |
478 | 478 | ||
479 | if (gpu->arch) | 479 | if (gpu->arch) |
480 | return 0; | 480 | return 0; |
481 | 481 | ||
482 | mc_boot_0_value = gk20a_readl(g, mc_boot_0_r()); | 482 | val = gk20a_mc_boot_0(g, &gpu->arch, &gpu->impl, &gpu->rev); |
483 | gpu->arch = mc_boot_0_architecture_v(mc_boot_0_value) << | ||
484 | NVGPU_GPU_ARCHITECTURE_SHIFT; | ||
485 | gpu->impl = mc_boot_0_implementation_v(mc_boot_0_value); | ||
486 | gpu->rev = | ||
487 | (mc_boot_0_major_revision_v(mc_boot_0_value) << 4) | | ||
488 | mc_boot_0_minor_revision_v(mc_boot_0_value); | ||
489 | 483 | ||
490 | gk20a_dbg_info("arch: %x, impl: %x, rev: %x\n", | 484 | gk20a_dbg_info("arch: %x, impl: %x, rev: %x\n", |
491 | g->gpu_characteristics.arch, | 485 | g->gpu_characteristics.arch, |
@@ -1513,45 +1507,6 @@ fail: | |||
1513 | up_read(&g->busy_lock); | 1507 | up_read(&g->busy_lock); |
1514 | } | 1508 | } |
1515 | 1509 | ||
1516 | void gk20a_disable(struct gk20a *g, u32 units) | ||
1517 | { | ||
1518 | u32 pmc; | ||
1519 | |||
1520 | gk20a_dbg(gpu_dbg_info, "pmc disable: %08x\n", units); | ||
1521 | |||
1522 | nvgpu_spinlock_acquire(&g->mc_enable_lock); | ||
1523 | pmc = gk20a_readl(g, mc_enable_r()); | ||
1524 | pmc &= ~units; | ||
1525 | gk20a_writel(g, mc_enable_r(), pmc); | ||
1526 | nvgpu_spinlock_release(&g->mc_enable_lock); | ||
1527 | } | ||
1528 | |||
1529 | void gk20a_enable(struct gk20a *g, u32 units) | ||
1530 | { | ||
1531 | u32 pmc; | ||
1532 | |||
1533 | gk20a_dbg(gpu_dbg_info, "pmc enable: %08x\n", units); | ||
1534 | |||
1535 | nvgpu_spinlock_acquire(&g->mc_enable_lock); | ||
1536 | pmc = gk20a_readl(g, mc_enable_r()); | ||
1537 | pmc |= units; | ||
1538 | gk20a_writel(g, mc_enable_r(), pmc); | ||
1539 | gk20a_readl(g, mc_enable_r()); | ||
1540 | nvgpu_spinlock_release(&g->mc_enable_lock); | ||
1541 | |||
1542 | udelay(20); | ||
1543 | } | ||
1544 | |||
1545 | void gk20a_reset(struct gk20a *g, u32 units) | ||
1546 | { | ||
1547 | gk20a_disable(g, units); | ||
1548 | if (units & gk20a_fifo_get_all_ce_engine_reset_mask(g)) | ||
1549 | udelay(500); | ||
1550 | else | ||
1551 | udelay(20); | ||
1552 | gk20a_enable(g, units); | ||
1553 | } | ||
1554 | |||
1555 | #ifdef CONFIG_PM | 1510 | #ifdef CONFIG_PM |
1556 | /** | 1511 | /** |
1557 | * __gk20a_do_idle() - force the GPU to idle and railgate | 1512 | * __gk20a_do_idle() - force the GPU to idle and railgate |