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path: root/drivers/gpu/nvgpu/gk20a/gk20a.c
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Diffstat (limited to 'drivers/gpu/nvgpu/gk20a/gk20a.c')
-rw-r--r--drivers/gpu/nvgpu/gk20a/gk20a.c30
1 files changed, 22 insertions, 8 deletions
diff --git a/drivers/gpu/nvgpu/gk20a/gk20a.c b/drivers/gpu/nvgpu/gk20a/gk20a.c
index 9958d24f..1cad8dcb 100644
--- a/drivers/gpu/nvgpu/gk20a/gk20a.c
+++ b/drivers/gpu/nvgpu/gk20a/gk20a.c
@@ -259,9 +259,28 @@ int gk20a_finalize_poweron(struct gk20a *g)
259 259
260 g->ops.mc.intr_enable(g); 260 g->ops.mc.intr_enable(g);
261 261
262 /*
263 * Overwrite can_tpc_powergate to false if the chip is ES fused and
264 * already optimized with some TPCs already floorswept
265 * via fuse. We will not support TPC-PG in those cases.
266 */
267
268 if (g->ops.fuse.fuse_status_opt_tpc_gpc(g, 0) != 0x0) {
269 g->can_tpc_powergate = false;
270 g->tpc_pg_mask = 0x0;
271 }
272
273 nvgpu_mutex_acquire(&g->tpc_pg_lock);
274
275 if (g->can_tpc_powergate) {
276 if (g->ops.gr.powergate_tpc != NULL)
277 g->ops.gr.powergate_tpc(g);
278 }
279
262 err = gk20a_enable_gr_hw(g); 280 err = gk20a_enable_gr_hw(g);
263 if (err) { 281 if (err) {
264 nvgpu_err(g, "failed to enable gr"); 282 nvgpu_err(g, "failed to enable gr");
283 nvgpu_mutex_release(&g->tpc_pg_lock);
265 goto done; 284 goto done;
266 } 285 }
267 286
@@ -271,6 +290,7 @@ int gk20a_finalize_poweron(struct gk20a *g)
271 } 290 }
272 if (err) { 291 if (err) {
273 nvgpu_err(g, "failed to init pmu ucode"); 292 nvgpu_err(g, "failed to init pmu ucode");
293 nvgpu_mutex_release(&g->tpc_pg_lock);
274 goto done; 294 goto done;
275 } 295 }
276 } 296 }
@@ -279,6 +299,7 @@ int gk20a_finalize_poweron(struct gk20a *g)
279 err = gk20a_init_pstate_support(g); 299 err = gk20a_init_pstate_support(g);
280 if (err) { 300 if (err) {
281 nvgpu_err(g, "failed to init pstates"); 301 nvgpu_err(g, "failed to init pstates");
302 nvgpu_mutex_release(&g->tpc_pg_lock);
282 goto done; 303 goto done;
283 } 304 }
284 } 305 }
@@ -296,18 +317,11 @@ int gk20a_finalize_poweron(struct gk20a *g)
296 err = nvgpu_init_pmu_support(g); 317 err = nvgpu_init_pmu_support(g);
297 if (err) { 318 if (err) {
298 nvgpu_err(g, "failed to init gk20a pmu"); 319 nvgpu_err(g, "failed to init gk20a pmu");
320 nvgpu_mutex_release(&g->tpc_pg_lock);
299 goto done; 321 goto done;
300 } 322 }
301 } 323 }
302 324
303 nvgpu_mutex_acquire(&g->tpc_pg_lock);
304
305 if (g->can_tpc_powergate) {
306 if (g->ops.gr.powergate_tpc != NULL) {
307 g->ops.gr.powergate_tpc(g);
308 }
309 }
310
311 err = gk20a_init_gr_support(g); 325 err = gk20a_init_gr_support(g);
312 if (err) { 326 if (err) {
313 nvgpu_err(g, "failed to init gk20a gr"); 327 nvgpu_err(g, "failed to init gk20a gr");