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path: root/drivers/gpu/nvgpu/gk20a/fifo_gk20a.h
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Diffstat (limited to 'drivers/gpu/nvgpu/gk20a/fifo_gk20a.h')
-rw-r--r--drivers/gpu/nvgpu/gk20a/fifo_gk20a.h4
1 files changed, 3 insertions, 1 deletions
diff --git a/drivers/gpu/nvgpu/gk20a/fifo_gk20a.h b/drivers/gpu/nvgpu/gk20a/fifo_gk20a.h
index 33d6d39c..f5a73a12 100644
--- a/drivers/gpu/nvgpu/gk20a/fifo_gk20a.h
+++ b/drivers/gpu/nvgpu/gk20a/fifo_gk20a.h
@@ -142,7 +142,7 @@ struct fifo_gk20a {
142 142
143 } intr; 143 } intr;
144 144
145 u32 deferred_fault_engines; 145 unsigned long deferred_fault_engines;
146 bool deferred_reset_pending; 146 bool deferred_reset_pending;
147 struct mutex deferred_reset_mutex; 147 struct mutex deferred_reset_mutex;
148}; 148};
@@ -242,6 +242,8 @@ bool gk20a_fifo_is_valid_engine_id(struct gk20a *g, u32 engine_id);
242 242
243u32 gk20a_fifo_get_gr_engine_id(struct gk20a *g); 243u32 gk20a_fifo_get_gr_engine_id(struct gk20a *g);
244 244
245int gk20a_fifo_deferred_reset(struct gk20a *g, struct channel_gk20a *ch);
246
245u32 gk20a_fifo_get_all_ce_engine_reset_mask(struct gk20a *g); 247u32 gk20a_fifo_get_all_ce_engine_reset_mask(struct gk20a *g);
246 248
247u32 gk20a_fifo_get_fast_ce_runlist_id(struct gk20a *g); 249u32 gk20a_fifo_get_fast_ce_runlist_id(struct gk20a *g);