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Diffstat (limited to 'drivers/gpu/nvgpu/gk20a/fifo_gk20a.c')
-rw-r--r--drivers/gpu/nvgpu/gk20a/fifo_gk20a.c40
1 files changed, 26 insertions, 14 deletions
diff --git a/drivers/gpu/nvgpu/gk20a/fifo_gk20a.c b/drivers/gpu/nvgpu/gk20a/fifo_gk20a.c
index c446e3ea..709631d4 100644
--- a/drivers/gpu/nvgpu/gk20a/fifo_gk20a.c
+++ b/drivers/gpu/nvgpu/gk20a/fifo_gk20a.c
@@ -3217,6 +3217,29 @@ int gk20a_fifo_tsg_set_timeslice(struct tsg_gk20a *tsg, u32 timeslice)
3217 return g->ops.fifo.update_runlist(g, tsg->runlist_id, ~0, true, true); 3217 return g->ops.fifo.update_runlist(g, tsg->runlist_id, ~0, true, true);
3218} 3218}
3219 3219
3220void gk20a_fifo_runlist_hw_submit(struct gk20a *g, u32 runlist_id,
3221 u32 count, u32 buffer_index)
3222{
3223 struct fifo_runlist_info_gk20a *runlist = NULL;
3224 u64 runlist_iova;
3225
3226 runlist = &g->fifo.runlist_info[runlist_id];
3227 runlist_iova = nvgpu_mem_get_addr(g, &runlist->mem[buffer_index]);
3228
3229 if (count != 0) {
3230 gk20a_writel(g, fifo_runlist_base_r(),
3231 fifo_runlist_base_ptr_f(u64_lo32(runlist_iova >> 12)) |
3232 nvgpu_aperture_mask(g, &runlist->mem[buffer_index],
3233 fifo_runlist_base_target_sys_mem_ncoh_f(),
3234 fifo_runlist_base_target_sys_mem_coh_f(),
3235 fifo_runlist_base_target_vid_mem_f()));
3236 }
3237
3238 gk20a_writel(g, fifo_runlist_r(),
3239 fifo_runlist_engine_f(runlist_id) |
3240 fifo_eng_runlist_length_f(count));
3241}
3242
3220static int gk20a_fifo_update_runlist_locked(struct gk20a *g, u32 runlist_id, 3243static int gk20a_fifo_update_runlist_locked(struct gk20a *g, u32 runlist_id,
3221 u32 chid, bool add, 3244 u32 chid, bool add,
3222 bool wait_for_finish) 3245 bool wait_for_finish)
@@ -3297,21 +3320,10 @@ static int gk20a_fifo_update_runlist_locked(struct gk20a *g, u32 runlist_id,
3297 } else /* suspend to remove all channels */ 3320 } else /* suspend to remove all channels */
3298 count = 0; 3321 count = 0;
3299 3322
3300 if (count != 0) { 3323 g->ops.fifo.runlist_hw_submit(g, runlist_id, count, new_buf);
3301 gk20a_writel(g, fifo_runlist_base_r(),
3302 fifo_runlist_base_ptr_f(u64_lo32(runlist_iova >> 12)) |
3303 nvgpu_aperture_mask(g, &runlist->mem[new_buf],
3304 fifo_runlist_base_target_sys_mem_ncoh_f(),
3305 fifo_runlist_base_target_sys_mem_coh_f(),
3306 fifo_runlist_base_target_vid_mem_f()));
3307 }
3308
3309 gk20a_writel(g, fifo_runlist_r(),
3310 fifo_runlist_engine_f(runlist_id) |
3311 fifo_eng_runlist_length_f(count));
3312 3324
3313 if (wait_for_finish) { 3325 if (wait_for_finish) {
3314 ret = gk20a_fifo_runlist_wait_pending(g, runlist_id); 3326 ret = g->ops.fifo.runlist_wait_pending(g, runlist_id);
3315 3327
3316 if (ret == -ETIMEDOUT) { 3328 if (ret == -ETIMEDOUT) {
3317 nvgpu_err(g, 3329 nvgpu_err(g,
@@ -3321,7 +3333,7 @@ static int gk20a_fifo_update_runlist_locked(struct gk20a *g, u32 runlist_id,
3321 3333
3322 /* engine reset needs the lock. drop it */ 3334 /* engine reset needs the lock. drop it */
3323 /* wait until the runlist is active again */ 3335 /* wait until the runlist is active again */
3324 ret = gk20a_fifo_runlist_wait_pending(g, runlist_id); 3336 ret = g->ops.fifo.runlist_wait_pending(g, runlist_id);
3325 /* get the lock back. at this point everything should 3337 /* get the lock back. at this point everything should
3326 * should be fine */ 3338 * should be fine */
3327 3339