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Diffstat (limited to 'drivers/gpu/nvgpu/gk20a/fifo_gk20a.c')
-rw-r--r--drivers/gpu/nvgpu/gk20a/fifo_gk20a.c5
1 files changed, 4 insertions, 1 deletions
diff --git a/drivers/gpu/nvgpu/gk20a/fifo_gk20a.c b/drivers/gpu/nvgpu/gk20a/fifo_gk20a.c
index 18928142..2740129f 100644
--- a/drivers/gpu/nvgpu/gk20a/fifo_gk20a.c
+++ b/drivers/gpu/nvgpu/gk20a/fifo_gk20a.c
@@ -1,7 +1,7 @@
1/* 1/*
2 * GK20A Graphics FIFO (gr host) 2 * GK20A Graphics FIFO (gr host)
3 * 3 *
4 * Copyright (c) 2011-2014, NVIDIA CORPORATION. All rights reserved. 4 * Copyright (c) 2011-2015, NVIDIA CORPORATION. All rights reserved.
5 * 5 *
6 * This program is free software; you can redistribute it and/or modify it 6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms and conditions of the GNU General Public License, 7 * under the terms and conditions of the GNU General Public License,
@@ -832,6 +832,9 @@ void gk20a_fifo_reset_engine(struct gk20a *g, u32 engine_id)
832 gk20a_dbg_fn(""); 832 gk20a_dbg_fn("");
833 833
834 if (engine_id == top_device_info_type_enum_graphics_v()) { 834 if (engine_id == top_device_info_type_enum_graphics_v()) {
835 /*HALT_PIPELINE method, halt GR engine*/
836 if (gr_gk20a_halt_pipe(g))
837 gk20a_err(dev_from_gk20a(g), "failed to HALT gr pipe");
835 /* resetting engine using mc_enable_r() is not enough, 838 /* resetting engine using mc_enable_r() is not enough,
836 * we do full init sequence */ 839 * we do full init sequence */
837 gk20a_gr_reset(g); 840 gk20a_gr_reset(g);