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path: root/drivers/gpu/nvgpu/gk20a/fifo_gk20a.c
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Diffstat (limited to 'drivers/gpu/nvgpu/gk20a/fifo_gk20a.c')
-rw-r--r--drivers/gpu/nvgpu/gk20a/fifo_gk20a.c12
1 files changed, 10 insertions, 2 deletions
diff --git a/drivers/gpu/nvgpu/gk20a/fifo_gk20a.c b/drivers/gpu/nvgpu/gk20a/fifo_gk20a.c
index f736fe8c..4f3363f2 100644
--- a/drivers/gpu/nvgpu/gk20a/fifo_gk20a.c
+++ b/drivers/gpu/nvgpu/gk20a/fifo_gk20a.c
@@ -344,6 +344,7 @@ int gk20a_init_fifo_reset_enable_hw(struct gk20a *g)
344 u32 mask; 344 u32 mask;
345 u32 timeout; 345 u32 timeout;
346 int i; 346 int i;
347 struct gk20a_platform *platform = platform_get_drvdata(g->dev);
347 348
348 gk20a_dbg_fn(""); 349 gk20a_dbg_fn("");
349 /* enable pmc pfifo */ 350 /* enable pmc pfifo */
@@ -408,8 +409,9 @@ int gk20a_init_fifo_reset_enable_hw(struct gk20a *g)
408 if (g->ops.fifo.apply_pb_timeout) 409 if (g->ops.fifo.apply_pb_timeout)
409 g->ops.fifo.apply_pb_timeout(g); 410 g->ops.fifo.apply_pb_timeout(g);
410 411
411 timeout = GRFIFO_TIMEOUT_CHECK_PERIOD_US | 412 timeout = GRFIFO_TIMEOUT_CHECK_PERIOD_US;
412 fifo_eng_timeout_detection_enabled_f(); 413 timeout = scale_ptimer(timeout, platform->ptimerscaling10x);
414 timeout |= fifo_eng_timeout_detection_enabled_f();
413 gk20a_writel(g, fifo_eng_timeout_r(), timeout); 415 gk20a_writel(g, fifo_eng_timeout_r(), timeout);
414 416
415 gk20a_dbg_fn("done"); 417 gk20a_dbg_fn("done");
@@ -1448,6 +1450,7 @@ static bool gk20a_fifo_handle_sched_error(struct gk20a *g)
1448 struct channel_gk20a *ch = &f->channel[id]; 1450 struct channel_gk20a *ch = &f->channel[id];
1449 1451
1450 if (is_tsg) { 1452 if (is_tsg) {
1453 gk20a_channel_timeout_stop_all_channels(g);
1451 gk20a_fifo_recover(g, BIT(engine_id), id, true, 1454 gk20a_fifo_recover(g, BIT(engine_id), id, true,
1452 true, true); 1455 true, true);
1453 ret = true; 1456 ret = true;
@@ -1465,6 +1468,11 @@ static bool gk20a_fifo_handle_sched_error(struct gk20a *g)
1465 "fifo sched ctxsw timeout error:" 1468 "fifo sched ctxsw timeout error:"
1466 "engine = %u, ch = %d", engine_id, id); 1469 "engine = %u, ch = %d", engine_id, id);
1467 gk20a_gr_debug_dump(g->dev); 1470 gk20a_gr_debug_dump(g->dev);
1471 /*
1472 * Cancel all channels' timeout since SCHED error might
1473 * trigger multiple watchdogs at a time
1474 */
1475 gk20a_channel_timeout_stop_all_channels(g);
1468 gk20a_fifo_recover(g, BIT(engine_id), id, false, 1476 gk20a_fifo_recover(g, BIT(engine_id), id, false,
1469 true, ch->timeout_debug_dump); 1477 true, ch->timeout_debug_dump);
1470 ret = true; 1478 ret = true;