diff options
Diffstat (limited to 'drivers/gpu/nvgpu/gk20a/fb_gk20a.c')
-rw-r--r-- | drivers/gpu/nvgpu/gk20a/fb_gk20a.c | 121 |
1 files changed, 121 insertions, 0 deletions
diff --git a/drivers/gpu/nvgpu/gk20a/fb_gk20a.c b/drivers/gpu/nvgpu/gk20a/fb_gk20a.c new file mode 100644 index 00000000..a5a2cb51 --- /dev/null +++ b/drivers/gpu/nvgpu/gk20a/fb_gk20a.c | |||
@@ -0,0 +1,121 @@ | |||
1 | /* | ||
2 | * GK20A memory interface | ||
3 | * | ||
4 | * Copyright (c) 2014-2017, NVIDIA CORPORATION. All rights reserved. | ||
5 | * | ||
6 | * Permission is hereby granted, free of charge, to any person obtaining a | ||
7 | * copy of this software and associated documentation files (the "Software"), | ||
8 | * to deal in the Software without restriction, including without limitation | ||
9 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, | ||
10 | * and/or sell copies of the Software, and to permit persons to whom the | ||
11 | * Software is furnished to do so, subject to the following conditions: | ||
12 | * | ||
13 | * The above copyright notice and this permission notice shall be included in | ||
14 | * all copies or substantial portions of the Software. | ||
15 | * | ||
16 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | ||
17 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | ||
18 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL | ||
19 | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER | ||
20 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING | ||
21 | * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER | ||
22 | * DEALINGS IN THE SOFTWARE. | ||
23 | */ | ||
24 | |||
25 | #include <trace/events/gk20a.h> | ||
26 | |||
27 | #include "gk20a.h" | ||
28 | #include "fb_gk20a.h" | ||
29 | |||
30 | #include <nvgpu/timers.h> | ||
31 | |||
32 | #include <nvgpu/hw/gk20a/hw_mc_gk20a.h> | ||
33 | #include <nvgpu/hw/gk20a/hw_fb_gk20a.h> | ||
34 | |||
35 | void fb_gk20a_reset(struct gk20a *g) | ||
36 | { | ||
37 | u32 val; | ||
38 | |||
39 | gk20a_dbg_info("reset gk20a fb"); | ||
40 | |||
41 | g->ops.mc.reset(g, mc_enable_pfb_enabled_f() | | ||
42 | mc_enable_l2_enabled_f() | | ||
43 | mc_enable_xbar_enabled_f() | | ||
44 | mc_enable_hub_enabled_f()); | ||
45 | |||
46 | val = gk20a_readl(g, mc_elpg_enable_r()); | ||
47 | val |= mc_elpg_enable_xbar_enabled_f() | ||
48 | | mc_elpg_enable_pfb_enabled_f() | ||
49 | | mc_elpg_enable_hub_enabled_f(); | ||
50 | gk20a_writel(g, mc_elpg_enable_r(), val); | ||
51 | } | ||
52 | |||
53 | void gk20a_fb_init_hw(struct gk20a *g) | ||
54 | { | ||
55 | u32 addr = nvgpu_mem_get_addr(g, &g->mm.sysmem_flush) >> 8; | ||
56 | |||
57 | gk20a_writel(g, fb_niso_flush_sysmem_addr_r(), addr); | ||
58 | } | ||
59 | |||
60 | void gk20a_fb_tlb_invalidate(struct gk20a *g, struct nvgpu_mem *pdb) | ||
61 | { | ||
62 | struct nvgpu_timeout timeout; | ||
63 | u32 addr_lo; | ||
64 | u32 data; | ||
65 | |||
66 | gk20a_dbg_fn(""); | ||
67 | |||
68 | /* pagetables are considered sw states which are preserved after | ||
69 | prepare_poweroff. When gk20a deinit releases those pagetables, | ||
70 | common code in vm unmap path calls tlb invalidate that touches | ||
71 | hw. Use the power_on flag to skip tlb invalidation when gpu | ||
72 | power is turned off */ | ||
73 | |||
74 | if (!g->power_on) | ||
75 | return; | ||
76 | |||
77 | addr_lo = u64_lo32(nvgpu_mem_get_addr(g, pdb) >> 12); | ||
78 | |||
79 | nvgpu_mutex_acquire(&g->mm.tlb_lock); | ||
80 | |||
81 | trace_gk20a_mm_tlb_invalidate(g->name); | ||
82 | |||
83 | nvgpu_timeout_init(g, &timeout, 1000, NVGPU_TIMER_RETRY_TIMER); | ||
84 | |||
85 | do { | ||
86 | data = gk20a_readl(g, fb_mmu_ctrl_r()); | ||
87 | if (fb_mmu_ctrl_pri_fifo_space_v(data) != 0) | ||
88 | break; | ||
89 | nvgpu_udelay(2); | ||
90 | } while (!nvgpu_timeout_expired_msg(&timeout, | ||
91 | "wait mmu fifo space")); | ||
92 | |||
93 | if (nvgpu_timeout_peek_expired(&timeout)) | ||
94 | goto out; | ||
95 | |||
96 | nvgpu_timeout_init(g, &timeout, 1000, NVGPU_TIMER_RETRY_TIMER); | ||
97 | |||
98 | gk20a_writel(g, fb_mmu_invalidate_pdb_r(), | ||
99 | fb_mmu_invalidate_pdb_addr_f(addr_lo) | | ||
100 | nvgpu_aperture_mask(g, pdb, | ||
101 | fb_mmu_invalidate_pdb_aperture_sys_mem_f(), | ||
102 | fb_mmu_invalidate_pdb_aperture_vid_mem_f())); | ||
103 | |||
104 | gk20a_writel(g, fb_mmu_invalidate_r(), | ||
105 | fb_mmu_invalidate_all_va_true_f() | | ||
106 | fb_mmu_invalidate_trigger_true_f()); | ||
107 | |||
108 | do { | ||
109 | data = gk20a_readl(g, fb_mmu_ctrl_r()); | ||
110 | if (fb_mmu_ctrl_pri_fifo_empty_v(data) != | ||
111 | fb_mmu_ctrl_pri_fifo_empty_false_f()) | ||
112 | break; | ||
113 | nvgpu_udelay(2); | ||
114 | } while (!nvgpu_timeout_expired_msg(&timeout, | ||
115 | "wait mmu invalidate")); | ||
116 | |||
117 | trace_gk20a_mm_tlb_invalidate_done(g->name); | ||
118 | |||
119 | out: | ||
120 | nvgpu_mutex_release(&g->mm.tlb_lock); | ||
121 | } | ||