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Diffstat (limited to 'drivers/gpu/nvgpu/gk20a/debug_gk20a.c')
-rw-r--r--drivers/gpu/nvgpu/gk20a/debug_gk20a.c182
1 files changed, 12 insertions, 170 deletions
diff --git a/drivers/gpu/nvgpu/gk20a/debug_gk20a.c b/drivers/gpu/nvgpu/gk20a/debug_gk20a.c
index 7c7d7ae6..89bfd0cf 100644
--- a/drivers/gpu/nvgpu/gk20a/debug_gk20a.c
+++ b/drivers/gpu/nvgpu/gk20a/debug_gk20a.c
@@ -33,49 +33,6 @@
33 33
34unsigned int gk20a_debug_trace_cmdbuf; 34unsigned int gk20a_debug_trace_cmdbuf;
35 35
36struct ch_state {
37 int pid;
38 int refs;
39 u32 inst_block[0];
40};
41
42static const char * const ccsr_chan_status_str[] = {
43 "idle",
44 "pending",
45 "pending_ctx_reload",
46 "pending_acquire",
47 "pending_acq_ctx_reload",
48 "on_pbdma",
49 "on_pbdma_and_eng",
50 "on_eng",
51 "on_eng_pending_acquire",
52 "on_eng_pending",
53 "on_pbdma_ctx_reload",
54 "on_pbdma_and_eng_ctx_reload",
55 "on_eng_ctx_reload",
56 "on_eng_pending_ctx_reload",
57 "on_eng_pending_acq_ctx_reload",
58};
59
60static const char * const chan_status_str[] = {
61 "invalid",
62 "valid",
63 "chsw_load",
64 "chsw_save",
65 "chsw_switch",
66};
67
68static const char * const ctx_status_str[] = {
69 "invalid",
70 "valid",
71 NULL,
72 NULL,
73 NULL,
74 "ctxsw_load",
75 "ctxsw_save",
76 "ctxsw_switch",
77};
78
79static inline void gk20a_debug_write_printk(void *ctx, const char *str, 36static inline void gk20a_debug_write_printk(void *ctx, const char *str,
80 size_t len) 37 size_t len)
81{ 38{
@@ -100,137 +57,13 @@ void gk20a_debug_output(struct gk20a_debug_output *o,
100 o->fn(o->ctx, o->buf, len); 57 o->fn(o->ctx, o->buf, len);
101} 58}
102 59
103static void gk20a_debug_show_channel(struct gk20a *g, 60static void gk20a_debug_dump_all_channel_status_ramfc(struct gk20a *g,
104 struct gk20a_debug_output *o, 61 struct gk20a_debug_output *o)
105 u32 hw_chid,
106 struct ch_state *ch_state)
107{
108 u32 channel = gk20a_readl(g, ccsr_channel_r(hw_chid));
109 u32 status = ccsr_channel_status_v(channel);
110 u32 syncpointa, syncpointb;
111 u32 *inst_mem;
112 struct channel_gk20a *c = g->fifo.channel + hw_chid;
113 struct nvgpu_semaphore_int *hw_sema = NULL;
114
115 if (c->hw_sema)
116 hw_sema = c->hw_sema;
117
118 if (!ch_state)
119 return;
120
121 inst_mem = &ch_state->inst_block[0];
122
123 syncpointa = inst_mem[ram_fc_syncpointa_w()];
124 syncpointb = inst_mem[ram_fc_syncpointb_w()];
125
126 gk20a_debug_output(o, "%d-%s, pid %d, refs: %d: ", hw_chid,
127 dev_name(g->dev),
128 ch_state->pid,
129 ch_state->refs);
130 gk20a_debug_output(o, "%s in use %s %s\n",
131 ccsr_channel_enable_v(channel) ? "" : "not",
132 ccsr_chan_status_str[status],
133 ccsr_channel_busy_v(channel) ? "busy" : "not busy");
134 gk20a_debug_output(o, "TOP: %016llx PUT: %016llx GET: %016llx "
135 "FETCH: %016llx\nHEADER: %08x COUNT: %08x\n"
136 "SYNCPOINT %08x %08x SEMAPHORE %08x %08x %08x %08x\n",
137 (u64)inst_mem[ram_fc_pb_top_level_get_w()] +
138 ((u64)inst_mem[ram_fc_pb_top_level_get_hi_w()] << 32ULL),
139 (u64)inst_mem[ram_fc_pb_put_w()] +
140 ((u64)inst_mem[ram_fc_pb_put_hi_w()] << 32ULL),
141 (u64)inst_mem[ram_fc_pb_get_w()] +
142 ((u64)inst_mem[ram_fc_pb_get_hi_w()] << 32ULL),
143 (u64)inst_mem[ram_fc_pb_fetch_w()] +
144 ((u64)inst_mem[ram_fc_pb_fetch_hi_w()] << 32ULL),
145 inst_mem[ram_fc_pb_header_w()],
146 inst_mem[ram_fc_pb_count_w()],
147 syncpointa,
148 syncpointb,
149 inst_mem[ram_fc_semaphorea_w()],
150 inst_mem[ram_fc_semaphoreb_w()],
151 inst_mem[ram_fc_semaphorec_w()],
152 inst_mem[ram_fc_semaphored_w()]);
153 if (hw_sema)
154 gk20a_debug_output(o, "SEMA STATE: value: 0x%08x "
155 "next_val: 0x%08x addr: 0x%010llx\n",
156 readl(hw_sema->value),
157 atomic_read(&hw_sema->next_value),
158 nvgpu_hw_sema_addr(hw_sema));
159
160#ifdef CONFIG_TEGRA_GK20A
161 if ((pbdma_syncpointb_op_v(syncpointb) == pbdma_syncpointb_op_wait_v())
162 && (pbdma_syncpointb_wait_switch_v(syncpointb) ==
163 pbdma_syncpointb_wait_switch_en_v()))
164 gk20a_debug_output(o, "%s on syncpt %u (%s) val %u\n",
165 (status == 3 || status == 8) ? "Waiting" : "Waited",
166 pbdma_syncpointb_syncpt_index_v(syncpointb),
167 nvhost_syncpt_get_name(g->host1x_dev,
168 pbdma_syncpointb_syncpt_index_v(syncpointb)),
169 pbdma_syncpointa_payload_v(syncpointa));
170#endif
171
172 gk20a_debug_output(o, "\n");
173}
174
175void gk20a_debug_show_dump(struct gk20a *g, struct gk20a_debug_output *o)
176{ 62{
177 struct fifo_gk20a *f = &g->fifo; 63 struct fifo_gk20a *f = &g->fifo;
178 u32 chid; 64 u32 chid;
179 unsigned int i;
180 u32 host_num_pbdma = nvgpu_get_litter_value(g, GPU_LIT_HOST_NUM_PBDMA);
181 u32 host_num_engines = nvgpu_get_litter_value(g,
182 GPU_LIT_HOST_NUM_ENGINES);
183
184 struct ch_state **ch_state; 65 struct ch_state **ch_state;
185 66
186 for (i = 0; i < host_num_pbdma; i++) {
187 u32 status = gk20a_readl(g, fifo_pbdma_status_r(i));
188 u32 chan_status = fifo_pbdma_status_chan_status_v(status);
189
190 gk20a_debug_output(o, "%s pbdma %d: ", dev_name(g->dev), i);
191 gk20a_debug_output(o,
192 "id: %d (%s), next_id: %d (%s) status: %s\n",
193 fifo_pbdma_status_id_v(status),
194 fifo_pbdma_status_id_type_v(status) ?
195 "tsg" : "channel",
196 fifo_pbdma_status_next_id_v(status),
197 fifo_pbdma_status_next_id_type_v(status) ?
198 "tsg" : "channel",
199 chan_status_str[chan_status]);
200 gk20a_debug_output(o, "PUT: %016llx GET: %016llx "
201 "FETCH: %08x HEADER: %08x\n",
202 (u64)gk20a_readl(g, pbdma_put_r(i)) +
203 ((u64)gk20a_readl(g, pbdma_put_hi_r(i)) << 32ULL),
204 (u64)gk20a_readl(g, pbdma_get_r(i)) +
205 ((u64)gk20a_readl(g, pbdma_get_hi_r(i)) << 32ULL),
206 gk20a_readl(g, pbdma_gp_fetch_r(i)),
207 gk20a_readl(g, pbdma_pb_header_r(i)));
208 }
209 gk20a_debug_output(o, "\n");
210
211 for (i = 0; i < host_num_engines; i++) {
212 u32 status = gk20a_readl(g, fifo_engine_status_r(i));
213 u32 ctx_status = fifo_engine_status_ctx_status_v(status);
214
215 gk20a_debug_output(o, "%s eng %d: ", dev_name(g->dev), i);
216 gk20a_debug_output(o,
217 "id: %d (%s), next_id: %d (%s), ctx: %s ",
218 fifo_engine_status_id_v(status),
219 fifo_engine_status_id_type_v(status) ?
220 "tsg" : "channel",
221 fifo_engine_status_next_id_v(status),
222 fifo_engine_status_next_id_type_v(status) ?
223 "tsg" : "channel",
224 ctx_status_str[ctx_status]);
225
226 if (fifo_engine_status_faulted_v(status))
227 gk20a_debug_output(o, "faulted ");
228 if (fifo_engine_status_engine_v(status))
229 gk20a_debug_output(o, "busy ");
230 gk20a_debug_output(o, "\n");
231 }
232 gk20a_debug_output(o, "\n");
233
234 ch_state = kzalloc(sizeof(*ch_state) 67 ch_state = kzalloc(sizeof(*ch_state)
235 * f->num_channels, GFP_KERNEL); 68 * f->num_channels, GFP_KERNEL);
236 if (!ch_state) { 69 if (!ch_state) {
@@ -265,13 +98,22 @@ void gk20a_debug_show_dump(struct gk20a *g, struct gk20a_debug_output *o)
265 } 98 }
266 for (chid = 0; chid < f->num_channels; chid++) { 99 for (chid = 0; chid < f->num_channels; chid++) {
267 if (ch_state[chid]) { 100 if (ch_state[chid]) {
268 gk20a_debug_show_channel(g, o, chid, ch_state[chid]); 101 g->ops.fifo.dump_channel_status_ramfc(g, o, chid,
102 ch_state[chid]);
269 kfree(ch_state[chid]); 103 kfree(ch_state[chid]);
270 } 104 }
271 } 105 }
272 kfree(ch_state); 106 kfree(ch_state);
273} 107}
274 108
109void gk20a_debug_show_dump(struct gk20a *g, struct gk20a_debug_output *o)
110{
111 g->ops.fifo.dump_pbdma_status(g, o);
112 g->ops.fifo.dump_eng_status(g, o);
113
114 gk20a_debug_dump_all_channel_status_ramfc(g, o);
115}
116
275static int gk20a_gr_dump_regs(struct device *dev, 117static int gk20a_gr_dump_regs(struct device *dev,
276 struct gk20a_debug_output *o) 118 struct gk20a_debug_output *o)
277{ 119{
generated by cgit v1.2.2 (git 2.25.0) at 2024-08-23 01:42:42 -0400