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Diffstat (limited to 'drivers/gpu/nvgpu/gk20a/ctxsw_trace_gk20a.h')
-rw-r--r--drivers/gpu/nvgpu/gk20a/ctxsw_trace_gk20a.h64
1 files changed, 0 insertions, 64 deletions
diff --git a/drivers/gpu/nvgpu/gk20a/ctxsw_trace_gk20a.h b/drivers/gpu/nvgpu/gk20a/ctxsw_trace_gk20a.h
deleted file mode 100644
index dddb8603..00000000
--- a/drivers/gpu/nvgpu/gk20a/ctxsw_trace_gk20a.h
+++ /dev/null
@@ -1,64 +0,0 @@
1/*
2 * Copyright (c) 2016-2017, NVIDIA CORPORATION. All rights reserved.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
18 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
19 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
20 * DEALINGS IN THE SOFTWARE.
21 */
22
23#ifndef __CTXSW_TRACE_GK20A_H
24#define __CTXSW_TRACE_GK20A_H
25
26#include <nvgpu/types.h>
27
28#define GK20A_CTXSW_TRACE_NUM_DEVS 1
29
30struct file;
31struct inode;
32struct gk20a;
33struct gpu_ops;
34struct nvgpu_ctxsw_trace_entry;
35struct channel_gk20a;
36struct channel_ctx_gk20a;
37struct gk20a_ctxsw_dev;
38struct gk20a_fecs_trace;
39struct tsg_gk20a;
40struct poll_table_struct;
41
42int gk20a_ctxsw_dev_release(struct inode *inode, struct file *filp);
43int gk20a_ctxsw_dev_open(struct inode *inode, struct file *filp);
44long gk20a_ctxsw_dev_ioctl(struct file *filp,
45 unsigned int cmd, unsigned long arg);
46ssize_t gk20a_ctxsw_dev_read(struct file *filp, char __user *buf,
47 size_t size, loff_t *offs);
48unsigned int gk20a_ctxsw_dev_poll(struct file *filp,
49 struct poll_table_struct *pts);
50int gk20a_ctxsw_dev_mmap(struct file *filp, struct vm_area_struct *vma);
51int gk20a_ctxsw_dev_ring_alloc(struct gk20a *g, void **buf, size_t *size);
52int gk20a_ctxsw_dev_ring_free(struct gk20a *g);
53int gk20a_ctxsw_dev_mmap_buffer(struct gk20a *g, struct vm_area_struct *vma);
54
55int gk20a_ctxsw_trace_init(struct gk20a *g);
56void gk20a_ctxsw_trace_cleanup(struct gk20a *g);
57int gk20a_ctxsw_trace_write(struct gk20a *g,
58 struct nvgpu_ctxsw_trace_entry *entry);
59void gk20a_ctxsw_trace_wake_up(struct gk20a *g, int vmid);
60
61void gk20a_ctxsw_trace_channel_reset(struct gk20a *g, struct channel_gk20a *ch);
62void gk20a_ctxsw_trace_tsg_reset(struct gk20a *g, struct tsg_gk20a *tsg);
63
64#endif /* __CTXSW_TRACE_GK20A_H */