diff options
Diffstat (limited to 'drivers/gpu/nvgpu/gk20a/ctxsw_trace_gk20a.c')
-rw-r--r-- | drivers/gpu/nvgpu/gk20a/ctxsw_trace_gk20a.c | 12 |
1 files changed, 6 insertions, 6 deletions
diff --git a/drivers/gpu/nvgpu/gk20a/ctxsw_trace_gk20a.c b/drivers/gpu/nvgpu/gk20a/ctxsw_trace_gk20a.c index 9977c5a1..fb33de23 100644 --- a/drivers/gpu/nvgpu/gk20a/ctxsw_trace_gk20a.c +++ b/drivers/gpu/nvgpu/gk20a/ctxsw_trace_gk20a.c | |||
@@ -53,7 +53,7 @@ struct gk20a_ctxsw_dev { | |||
53 | struct nvgpu_ctxsw_trace_entry *ents; | 53 | struct nvgpu_ctxsw_trace_entry *ents; |
54 | struct nvgpu_ctxsw_trace_filter filter; | 54 | struct nvgpu_ctxsw_trace_filter filter; |
55 | bool write_enabled; | 55 | bool write_enabled; |
56 | wait_queue_head_t readout_wq; | 56 | struct nvgpu_cond readout_wq; |
57 | size_t size; | 57 | size_t size; |
58 | u32 num_ents; | 58 | u32 num_ents; |
59 | 59 | ||
@@ -100,8 +100,8 @@ ssize_t gk20a_ctxsw_dev_read(struct file *filp, char __user *buf, size_t size, | |||
100 | nvgpu_mutex_release(&dev->write_lock); | 100 | nvgpu_mutex_release(&dev->write_lock); |
101 | if (filp->f_flags & O_NONBLOCK) | 101 | if (filp->f_flags & O_NONBLOCK) |
102 | return -EAGAIN; | 102 | return -EAGAIN; |
103 | err = wait_event_interruptible(dev->readout_wq, | 103 | err = NVGPU_COND_WAIT_INTERRUPTIBLE(&dev->readout_wq, |
104 | !ring_is_empty(hdr)); | 104 | !ring_is_empty(hdr), 0); |
105 | if (err) | 105 | if (err) |
106 | return err; | 106 | return err; |
107 | nvgpu_mutex_acquire(&dev->write_lock); | 107 | nvgpu_mutex_acquire(&dev->write_lock); |
@@ -436,7 +436,7 @@ unsigned int gk20a_ctxsw_dev_poll(struct file *filp, poll_table *wait) | |||
436 | gk20a_dbg(gpu_dbg_fn|gpu_dbg_ctxsw, ""); | 436 | gk20a_dbg(gpu_dbg_fn|gpu_dbg_ctxsw, ""); |
437 | 437 | ||
438 | nvgpu_mutex_acquire(&dev->write_lock); | 438 | nvgpu_mutex_acquire(&dev->write_lock); |
439 | poll_wait(filp, &dev->readout_wq, wait); | 439 | poll_wait(filp, &dev->readout_wq.wq, wait); |
440 | if (!ring_is_empty(hdr)) | 440 | if (!ring_is_empty(hdr)) |
441 | mask |= POLLIN | POLLRDNORM; | 441 | mask |= POLLIN | POLLRDNORM; |
442 | nvgpu_mutex_release(&dev->write_lock); | 442 | nvgpu_mutex_release(&dev->write_lock); |
@@ -503,7 +503,7 @@ static int gk20a_ctxsw_init_devs(struct gk20a *g) | |||
503 | dev->g = g; | 503 | dev->g = g; |
504 | dev->hdr = NULL; | 504 | dev->hdr = NULL; |
505 | dev->write_enabled = false; | 505 | dev->write_enabled = false; |
506 | init_waitqueue_head(&dev->readout_wq); | 506 | nvgpu_cond_init(&dev->readout_wq); |
507 | err = nvgpu_mutex_init(&dev->write_lock); | 507 | err = nvgpu_mutex_init(&dev->write_lock); |
508 | if (err) | 508 | if (err) |
509 | return err; | 509 | return err; |
@@ -683,7 +683,7 @@ void gk20a_ctxsw_trace_wake_up(struct gk20a *g, int vmid) | |||
683 | return; | 683 | return; |
684 | 684 | ||
685 | dev = &g->ctxsw_trace->devs[vmid]; | 685 | dev = &g->ctxsw_trace->devs[vmid]; |
686 | wake_up_interruptible(&dev->readout_wq); | 686 | nvgpu_cond_signal_interruptible(&dev->readout_wq); |
687 | } | 687 | } |
688 | 688 | ||
689 | void gk20a_ctxsw_trace_channel_reset(struct gk20a *g, struct channel_gk20a *ch) | 689 | void gk20a_ctxsw_trace_channel_reset(struct gk20a *g, struct channel_gk20a *ch) |