diff options
Diffstat (limited to 'drivers/gpu/nvgpu/gk20a/ctrl_gk20a.c')
-rw-r--r-- | drivers/gpu/nvgpu/gk20a/ctrl_gk20a.c | 22 |
1 files changed, 16 insertions, 6 deletions
diff --git a/drivers/gpu/nvgpu/gk20a/ctrl_gk20a.c b/drivers/gpu/nvgpu/gk20a/ctrl_gk20a.c index aa2c4959..5c9baf77 100644 --- a/drivers/gpu/nvgpu/gk20a/ctrl_gk20a.c +++ b/drivers/gpu/nvgpu/gk20a/ctrl_gk20a.c | |||
@@ -869,7 +869,7 @@ static int nvgpu_gpu_clk_get_vf_points(struct gk20a *g, | |||
869 | clk_domains = nvgpu_clk_arb_get_arbiter_clk_domains(g); | 869 | clk_domains = nvgpu_clk_arb_get_arbiter_clk_domains(g); |
870 | args->num_entries = 0; | 870 | args->num_entries = 0; |
871 | 871 | ||
872 | if ((args->clk_domain & clk_domains) == 0) | 872 | if (!nvgpu_clk_arb_is_valid_domain(g, args->clk_domain)) |
873 | return -EINVAL; | 873 | return -EINVAL; |
874 | 874 | ||
875 | err = nvgpu_clk_arb_get_arbiter_clk_f_points(g, | 875 | err = nvgpu_clk_arb_get_arbiter_clk_f_points(g, |
@@ -987,7 +987,10 @@ static int nvgpu_gpu_clk_get_range(struct gk20a *g, | |||
987 | return -EFAULT; | 987 | return -EFAULT; |
988 | } else { | 988 | } else { |
989 | bit = ffs(clk_domains) - 1; | 989 | bit = ffs(clk_domains) - 1; |
990 | clk_range.clk_domain = BIT(bit); | 990 | if (bit <= NVGPU_GPU_CLK_DOMAIN_GPCCLK) |
991 | clk_range.clk_domain = bit; | ||
992 | else | ||
993 | clk_range.clk_domain = BIT(bit); | ||
991 | clk_domains &= ~BIT(bit); | 994 | clk_domains &= ~BIT(bit); |
992 | } | 995 | } |
993 | 996 | ||
@@ -1031,6 +1034,8 @@ static int nvgpu_gpu_clk_set_info(struct gk20a *g, | |||
1031 | if (!session || args->flags) | 1034 | if (!session || args->flags) |
1032 | return -EINVAL; | 1035 | return -EINVAL; |
1033 | 1036 | ||
1037 | gk20a_dbg_info("line=%d", __LINE__); | ||
1038 | |||
1034 | clk_domains = nvgpu_clk_arb_get_arbiter_clk_domains(g); | 1039 | clk_domains = nvgpu_clk_arb_get_arbiter_clk_domains(g); |
1035 | if (!clk_domains) | 1040 | if (!clk_domains) |
1036 | return -EINVAL; | 1041 | return -EINVAL; |
@@ -1038,15 +1043,17 @@ static int nvgpu_gpu_clk_set_info(struct gk20a *g, | |||
1038 | entry = (struct nvgpu_gpu_clk_info __user *) | 1043 | entry = (struct nvgpu_gpu_clk_info __user *) |
1039 | (uintptr_t)args->clk_info_entries; | 1044 | (uintptr_t)args->clk_info_entries; |
1040 | 1045 | ||
1046 | gk20a_dbg_info("line=%d", __LINE__); | ||
1047 | |||
1041 | for (i = 0; i < args->num_entries; i++, entry++) { | 1048 | for (i = 0; i < args->num_entries; i++, entry++) { |
1042 | 1049 | ||
1050 | gk20a_dbg_info("line=%d", __LINE__); | ||
1043 | if (copy_from_user(&clk_info, entry, sizeof(clk_info))) | 1051 | if (copy_from_user(&clk_info, entry, sizeof(clk_info))) |
1044 | return -EFAULT; | 1052 | return -EFAULT; |
1045 | 1053 | ||
1046 | if ((clk_info.clk_domain & clk_domains) != clk_info.clk_domain) | 1054 | gk20a_dbg_info("i=%d domain=0x%08x", i, clk_info.clk_domain); |
1047 | return -EINVAL; | ||
1048 | 1055 | ||
1049 | if (hweight_long(clk_info.clk_domain) != 1) | 1056 | if (!nvgpu_clk_arb_is_valid_domain(g, clk_info.clk_domain)) |
1050 | return -EINVAL; | 1057 | return -EINVAL; |
1051 | } | 1058 | } |
1052 | 1059 | ||
@@ -1132,7 +1139,10 @@ static int nvgpu_gpu_clk_get_info(struct gk20a *g, | |||
1132 | return -EFAULT; | 1139 | return -EFAULT; |
1133 | } else { | 1140 | } else { |
1134 | bit = ffs(clk_domains) - 1; | 1141 | bit = ffs(clk_domains) - 1; |
1135 | clk_info.clk_domain = BIT(bit); | 1142 | if (bit <= NVGPU_GPU_CLK_DOMAIN_GPCCLK) |
1143 | clk_info.clk_domain = bit; | ||
1144 | else | ||
1145 | clk_info.clk_domain = BIT(bit); | ||
1136 | clk_domains &= ~BIT(bit); | 1146 | clk_domains &= ~BIT(bit); |
1137 | clk_info.clk_type = args->clk_type; | 1147 | clk_info.clk_type = args->clk_type; |
1138 | } | 1148 | } |