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path: root/drivers/gpu/nvgpu/gk20a/ctrl_gk20a.c
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Diffstat (limited to 'drivers/gpu/nvgpu/gk20a/ctrl_gk20a.c')
-rw-r--r--drivers/gpu/nvgpu/gk20a/ctrl_gk20a.c33
1 files changed, 21 insertions, 12 deletions
diff --git a/drivers/gpu/nvgpu/gk20a/ctrl_gk20a.c b/drivers/gpu/nvgpu/gk20a/ctrl_gk20a.c
index 6dc92713..18567064 100644
--- a/drivers/gpu/nvgpu/gk20a/ctrl_gk20a.c
+++ b/drivers/gpu/nvgpu/gk20a/ctrl_gk20a.c
@@ -314,7 +314,7 @@ static int nvgpu_gpu_ioctl_set_mmu_debug_mode(
314 struct nvgpu_gpu_mmu_debug_mode_args *args) 314 struct nvgpu_gpu_mmu_debug_mode_args *args)
315{ 315{
316 int err = 0; 316 int err = 0;
317 u32 mmu_debug_ctrl; 317 u32 reg_val, mmu_debug_ctrl;
318 318
319 err = gk20a_busy(g->dev); 319 err = gk20a_busy(g->dev);
320 if (err) { 320 if (err) {
@@ -325,16 +325,17 @@ static int nvgpu_gpu_ioctl_set_mmu_debug_mode(
325 mutex_lock(&g->dbg_sessions_lock); 325 mutex_lock(&g->dbg_sessions_lock);
326 326
327 if (args->state == 1) { 327 if (args->state == 1) {
328 mmu_debug_ctrl = fb_mmu_debug_ctrl_debug_enabled_v(); 328 mmu_debug_ctrl = fb_mmu_debug_ctrl_debug_enabled_f();
329 g->mmu_debug_ctrl = true; 329 g->mmu_debug_ctrl = true;
330 } else { 330 } else {
331 mmu_debug_ctrl = fb_mmu_debug_ctrl_debug_disabled_v(); 331 mmu_debug_ctrl = fb_mmu_debug_ctrl_debug_disabled_f();
332 g->mmu_debug_ctrl = false; 332 g->mmu_debug_ctrl = false;
333 } 333 }
334 334
335 mmu_debug_ctrl = gk20a_readl(g, fb_mmu_debug_ctrl_r()); 335 reg_val = gk20a_readl(g, fb_mmu_debug_ctrl_r());
336 mmu_debug_ctrl = set_field(mmu_debug_ctrl, fb_mmu_debug_ctrl_debug_m(), mmu_debug_ctrl); 336 reg_val = set_field(reg_val,
337 gk20a_writel(g, fb_mmu_debug_ctrl_r(), mmu_debug_ctrl); 337 fb_mmu_debug_ctrl_debug_m(), mmu_debug_ctrl);
338 gk20a_writel(g, fb_mmu_debug_ctrl_r(), reg_val);
338 339
339 mutex_unlock(&g->dbg_sessions_lock); 340 mutex_unlock(&g->dbg_sessions_lock);
340 gk20a_idle(g->dev); 341 gk20a_idle(g->dev);
@@ -376,12 +377,20 @@ static int nvgpu_gpu_ioctl_set_debug_mode(
376 sm_dbgr_ctrl0 = ops.value_lo; 377 sm_dbgr_ctrl0 = ops.value_lo;
377 378
378 if (args->enable) { 379 if (args->enable) {
379 sm_dbgr_ctrl0 = gr_gpc0_tpc0_sm_dbgr_control0_debugger_mode_on_v() | 380 sm_dbgr_ctrl0 = set_field(sm_dbgr_ctrl0,
380 gr_gpc0_tpc0_sm_dbgr_control0_stop_on_any_warp_disable_f() | 381 gr_gpc0_tpc0_sm_dbgr_control0_debugger_mode_m(),
381 gr_gpc0_tpc0_sm_dbgr_control0_stop_on_any_sm_disable_f() | 382 gr_gpc0_tpc0_sm_dbgr_control0_debugger_mode_on_f());
382 sm_dbgr_ctrl0; 383 sm_dbgr_ctrl0 = set_field(sm_dbgr_ctrl0,
383 } else 384 gr_gpc0_tpc0_sm_dbgr_control0_stop_on_any_warp_m(),
384 sm_dbgr_ctrl0 = gr_gpc0_tpc0_sm_dbgr_control0_debugger_mode_off_v() | sm_dbgr_ctrl0; 385 gr_gpc0_tpc0_sm_dbgr_control0_stop_on_any_warp_disable_f());
386 sm_dbgr_ctrl0 = set_field(sm_dbgr_ctrl0,
387 gr_gpc0_tpc0_sm_dbgr_control0_stop_on_any_sm_m(),
388 gr_gpc0_tpc0_sm_dbgr_control0_stop_on_any_sm_disable_f());
389 } else {
390 sm_dbgr_ctrl0 = set_field(sm_dbgr_ctrl0,
391 gr_gpc0_tpc0_sm_dbgr_control0_debugger_mode_m(),
392 gr_gpc0_tpc0_sm_dbgr_control0_debugger_mode_off_f());
393 }
385 394
386 if (!err) { 395 if (!err) {
387 ops.op = REGOP(WRITE_32); 396 ops.op = REGOP(WRITE_32);