diff options
Diffstat (limited to 'drivers/gpu/nvgpu/gk20a/ctrl_gk20a.c')
-rw-r--r-- | drivers/gpu/nvgpu/gk20a/ctrl_gk20a.c | 64 |
1 files changed, 31 insertions, 33 deletions
diff --git a/drivers/gpu/nvgpu/gk20a/ctrl_gk20a.c b/drivers/gpu/nvgpu/gk20a/ctrl_gk20a.c index d1560cad..0feb92a5 100644 --- a/drivers/gpu/nvgpu/gk20a/ctrl_gk20a.c +++ b/drivers/gpu/nvgpu/gk20a/ctrl_gk20a.c | |||
@@ -1,6 +1,4 @@ | |||
1 | /* | 1 | /* |
2 | * GK20A Ctrl | ||
3 | * | ||
4 | * Copyright (c) 2011-2014, NVIDIA Corporation. All rights reserved. | 2 | * Copyright (c) 2011-2014, NVIDIA Corporation. All rights reserved. |
5 | * | 3 | * |
6 | * This program is free software; you can redistribute it and/or modify it | 4 | * This program is free software; you can redistribute it and/or modify it |
@@ -57,9 +55,9 @@ int gk20a_ctrl_dev_release(struct inode *inode, struct file *filp) | |||
57 | static long | 55 | static long |
58 | gk20a_ctrl_ioctl_gpu_characteristics( | 56 | gk20a_ctrl_ioctl_gpu_characteristics( |
59 | struct gk20a *g, | 57 | struct gk20a *g, |
60 | struct nvhost_gpu_get_characteristics *request) | 58 | struct nvgpu_gpu_get_characteristics *request) |
61 | { | 59 | { |
62 | struct nvhost_gpu_characteristics *pgpu = &g->gpu_characteristics; | 60 | struct nvgpu_gpu_characteristics *pgpu = &g->gpu_characteristics; |
63 | long err = 0; | 61 | long err = 0; |
64 | 62 | ||
65 | if (request->gpu_characteristics_buf_size > 0) { | 63 | if (request->gpu_characteristics_buf_size > 0) { |
@@ -81,14 +79,14 @@ gk20a_ctrl_ioctl_gpu_characteristics( | |||
81 | 79 | ||
82 | static int gk20a_ctrl_prepare_compressible_read( | 80 | static int gk20a_ctrl_prepare_compressible_read( |
83 | struct gk20a *g, | 81 | struct gk20a *g, |
84 | struct nvhost_gpu_prepare_compressible_read_args *args) | 82 | struct nvgpu_gpu_prepare_compressible_read_args *args) |
85 | { | 83 | { |
86 | struct nvhost_fence fence; | 84 | struct nvgpu_fence fence; |
87 | struct gk20a_fence *fence_out = NULL; | 85 | struct gk20a_fence *fence_out = NULL; |
88 | int ret = 0; | 86 | int ret = 0; |
89 | int flags = args->submit_flags; | 87 | int flags = args->submit_flags; |
90 | 88 | ||
91 | fence.syncpt_id = args->fence.syncpt_id; | 89 | fence.id = args->fence.syncpt_id; |
92 | fence.value = args->fence.syncpt_value; | 90 | fence.value = args->fence.syncpt_value; |
93 | 91 | ||
94 | ret = gk20a_busy(g->dev); | 92 | ret = gk20a_busy(g->dev); |
@@ -107,8 +105,8 @@ static int gk20a_ctrl_prepare_compressible_read( | |||
107 | return ret; | 105 | return ret; |
108 | 106 | ||
109 | /* Convert fence_out to something we can pass back to user space. */ | 107 | /* Convert fence_out to something we can pass back to user space. */ |
110 | if (flags & NVHOST_SUBMIT_GPFIFO_FLAGS_FENCE_GET) { | 108 | if (flags & NVGPU_SUBMIT_GPFIFO_FLAGS_FENCE_GET) { |
111 | if (flags & NVHOST_SUBMIT_GPFIFO_FLAGS_SYNC_FENCE) { | 109 | if (flags & NVGPU_SUBMIT_GPFIFO_FLAGS_SYNC_FENCE) { |
112 | if (fence_out) { | 110 | if (fence_out) { |
113 | int fd = gk20a_fence_install_fd(fence_out); | 111 | int fd = gk20a_fence_install_fd(fence_out); |
114 | if (fd < 0) | 112 | if (fd < 0) |
@@ -136,7 +134,7 @@ static int gk20a_ctrl_prepare_compressible_read( | |||
136 | 134 | ||
137 | static int gk20a_ctrl_mark_compressible_write( | 135 | static int gk20a_ctrl_mark_compressible_write( |
138 | struct gk20a *g, | 136 | struct gk20a *g, |
139 | struct nvhost_gpu_mark_compressible_write_args *args) | 137 | struct nvgpu_gpu_mark_compressible_write_args *args) |
140 | { | 138 | { |
141 | int ret = 0; | 139 | int ret = 0; |
142 | 140 | ||
@@ -154,11 +152,11 @@ long gk20a_ctrl_dev_ioctl(struct file *filp, unsigned int cmd, unsigned long arg | |||
154 | { | 152 | { |
155 | struct platform_device *dev = filp->private_data; | 153 | struct platform_device *dev = filp->private_data; |
156 | struct gk20a *g = get_gk20a(dev); | 154 | struct gk20a *g = get_gk20a(dev); |
157 | struct nvhost_gpu_zcull_get_ctx_size_args *get_ctx_size_args; | 155 | struct nvgpu_gpu_zcull_get_ctx_size_args *get_ctx_size_args; |
158 | struct nvhost_gpu_zcull_get_info_args *get_info_args; | 156 | struct nvgpu_gpu_zcull_get_info_args *get_info_args; |
159 | struct nvhost_gpu_zbc_set_table_args *set_table_args; | 157 | struct nvgpu_gpu_zbc_set_table_args *set_table_args; |
160 | struct nvhost_gpu_zbc_query_table_args *query_table_args; | 158 | struct nvgpu_gpu_zbc_query_table_args *query_table_args; |
161 | u8 buf[NVHOST_GPU_IOCTL_MAX_ARG_SIZE]; | 159 | u8 buf[NVGPU_GPU_IOCTL_MAX_ARG_SIZE]; |
162 | struct gr_zcull_info *zcull_info; | 160 | struct gr_zcull_info *zcull_info; |
163 | struct zbc_entry *zbc_val; | 161 | struct zbc_entry *zbc_val; |
164 | struct zbc_query_params *zbc_tbl; | 162 | struct zbc_query_params *zbc_tbl; |
@@ -169,12 +167,12 @@ long gk20a_ctrl_dev_ioctl(struct file *filp, unsigned int cmd, unsigned long arg | |||
169 | 167 | ||
170 | gk20a_dbg_fn(""); | 168 | gk20a_dbg_fn(""); |
171 | 169 | ||
172 | if ((_IOC_TYPE(cmd) != NVHOST_GPU_IOCTL_MAGIC) || | 170 | if ((_IOC_TYPE(cmd) != NVGPU_GPU_IOCTL_MAGIC) || |
173 | (_IOC_NR(cmd) == 0) || | 171 | (_IOC_NR(cmd) == 0) || |
174 | (_IOC_NR(cmd) > NVHOST_GPU_IOCTL_LAST)) | 172 | (_IOC_NR(cmd) > NVGPU_GPU_IOCTL_LAST)) |
175 | return -EINVAL; | 173 | return -EINVAL; |
176 | 174 | ||
177 | BUG_ON(_IOC_SIZE(cmd) > NVHOST_GPU_IOCTL_MAX_ARG_SIZE); | 175 | BUG_ON(_IOC_SIZE(cmd) > NVGPU_GPU_IOCTL_MAX_ARG_SIZE); |
178 | 176 | ||
179 | if (_IOC_DIR(cmd) & _IOC_WRITE) { | 177 | if (_IOC_DIR(cmd) & _IOC_WRITE) { |
180 | if (copy_from_user(buf, (void __user *)arg, _IOC_SIZE(cmd))) | 178 | if (copy_from_user(buf, (void __user *)arg, _IOC_SIZE(cmd))) |
@@ -190,16 +188,16 @@ long gk20a_ctrl_dev_ioctl(struct file *filp, unsigned int cmd, unsigned long arg | |||
190 | } | 188 | } |
191 | 189 | ||
192 | switch (cmd) { | 190 | switch (cmd) { |
193 | case NVHOST_GPU_IOCTL_ZCULL_GET_CTX_SIZE: | 191 | case NVGPU_GPU_IOCTL_ZCULL_GET_CTX_SIZE: |
194 | get_ctx_size_args = (struct nvhost_gpu_zcull_get_ctx_size_args *)buf; | 192 | get_ctx_size_args = (struct nvgpu_gpu_zcull_get_ctx_size_args *)buf; |
195 | 193 | ||
196 | get_ctx_size_args->size = gr_gk20a_get_ctxsw_zcull_size(g, &g->gr); | 194 | get_ctx_size_args->size = gr_gk20a_get_ctxsw_zcull_size(g, &g->gr); |
197 | 195 | ||
198 | break; | 196 | break; |
199 | case NVHOST_GPU_IOCTL_ZCULL_GET_INFO: | 197 | case NVGPU_GPU_IOCTL_ZCULL_GET_INFO: |
200 | get_info_args = (struct nvhost_gpu_zcull_get_info_args *)buf; | 198 | get_info_args = (struct nvgpu_gpu_zcull_get_info_args *)buf; |
201 | 199 | ||
202 | memset(get_info_args, 0, sizeof(struct nvhost_gpu_zcull_get_info_args)); | 200 | memset(get_info_args, 0, sizeof(struct nvgpu_gpu_zcull_get_info_args)); |
203 | 201 | ||
204 | zcull_info = kzalloc(sizeof(struct gr_zcull_info), GFP_KERNEL); | 202 | zcull_info = kzalloc(sizeof(struct gr_zcull_info), GFP_KERNEL); |
205 | if (zcull_info == NULL) | 203 | if (zcull_info == NULL) |
@@ -224,8 +222,8 @@ long gk20a_ctrl_dev_ioctl(struct file *filp, unsigned int cmd, unsigned long arg | |||
224 | 222 | ||
225 | kfree(zcull_info); | 223 | kfree(zcull_info); |
226 | break; | 224 | break; |
227 | case NVHOST_GPU_IOCTL_ZBC_SET_TABLE: | 225 | case NVGPU_GPU_IOCTL_ZBC_SET_TABLE: |
228 | set_table_args = (struct nvhost_gpu_zbc_set_table_args *)buf; | 226 | set_table_args = (struct nvgpu_gpu_zbc_set_table_args *)buf; |
229 | 227 | ||
230 | #ifdef CONFIG_TEGRA_GR_VIRTUALIZATION | 228 | #ifdef CONFIG_TEGRA_GR_VIRTUALIZATION |
231 | if (platform->virtual_dev) | 229 | if (platform->virtual_dev) |
@@ -264,8 +262,8 @@ long gk20a_ctrl_dev_ioctl(struct file *filp, unsigned int cmd, unsigned long arg | |||
264 | if (zbc_val) | 262 | if (zbc_val) |
265 | kfree(zbc_val); | 263 | kfree(zbc_val); |
266 | break; | 264 | break; |
267 | case NVHOST_GPU_IOCTL_ZBC_QUERY_TABLE: | 265 | case NVGPU_GPU_IOCTL_ZBC_QUERY_TABLE: |
268 | query_table_args = (struct nvhost_gpu_zbc_query_table_args *)buf; | 266 | query_table_args = (struct nvgpu_gpu_zbc_query_table_args *)buf; |
269 | 267 | ||
270 | zbc_tbl = kzalloc(sizeof(struct zbc_query_params), GFP_KERNEL); | 268 | zbc_tbl = kzalloc(sizeof(struct zbc_query_params), GFP_KERNEL); |
271 | if (zbc_tbl == NULL) | 269 | if (zbc_tbl == NULL) |
@@ -303,17 +301,17 @@ long gk20a_ctrl_dev_ioctl(struct file *filp, unsigned int cmd, unsigned long arg | |||
303 | kfree(zbc_tbl); | 301 | kfree(zbc_tbl); |
304 | break; | 302 | break; |
305 | 303 | ||
306 | case NVHOST_GPU_IOCTL_GET_CHARACTERISTICS: | 304 | case NVGPU_GPU_IOCTL_GET_CHARACTERISTICS: |
307 | err = gk20a_ctrl_ioctl_gpu_characteristics( | 305 | err = gk20a_ctrl_ioctl_gpu_characteristics( |
308 | g, (struct nvhost_gpu_get_characteristics *)buf); | 306 | g, (struct nvgpu_gpu_get_characteristics *)buf); |
309 | break; | 307 | break; |
310 | case NVHOST_GPU_IOCTL_PREPARE_COMPRESSIBLE_READ: | 308 | case NVGPU_GPU_IOCTL_PREPARE_COMPRESSIBLE_READ: |
311 | err = gk20a_ctrl_prepare_compressible_read(g, | 309 | err = gk20a_ctrl_prepare_compressible_read(g, |
312 | (struct nvhost_gpu_prepare_compressible_read_args *)buf); | 310 | (struct nvgpu_gpu_prepare_compressible_read_args *)buf); |
313 | break; | 311 | break; |
314 | case NVHOST_GPU_IOCTL_MARK_COMPRESSIBLE_WRITE: | 312 | case NVGPU_GPU_IOCTL_MARK_COMPRESSIBLE_WRITE: |
315 | err = gk20a_ctrl_mark_compressible_write(g, | 313 | err = gk20a_ctrl_mark_compressible_write(g, |
316 | (struct nvhost_gpu_mark_compressible_write_args *)buf); | 314 | (struct nvgpu_gpu_mark_compressible_write_args *)buf); |
317 | break; | 315 | break; |
318 | default: | 316 | default: |
319 | dev_dbg(dev_from_gk20a(g), "unrecognized gpu ioctl cmd: 0x%x", cmd); | 317 | dev_dbg(dev_from_gk20a(g), "unrecognized gpu ioctl cmd: 0x%x", cmd); |