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path: root/drivers/gpu/nvgpu/gk20a/channel_sync_gk20a.c
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Diffstat (limited to 'drivers/gpu/nvgpu/gk20a/channel_sync_gk20a.c')
-rw-r--r--drivers/gpu/nvgpu/gk20a/channel_sync_gk20a.c18
1 files changed, 17 insertions, 1 deletions
diff --git a/drivers/gpu/nvgpu/gk20a/channel_sync_gk20a.c b/drivers/gpu/nvgpu/gk20a/channel_sync_gk20a.c
index 9c8911e9..e4972610 100644
--- a/drivers/gpu/nvgpu/gk20a/channel_sync_gk20a.c
+++ b/drivers/gpu/nvgpu/gk20a/channel_sync_gk20a.c
@@ -428,9 +428,12 @@ static void add_sema_cmd(struct gk20a *g, struct channel_gk20a *c,
428 struct gk20a_semaphore *s, struct priv_cmd_entry *cmd, 428 struct gk20a_semaphore *s, struct priv_cmd_entry *cmd,
429 int cmd_size, bool acquire, bool wfi) 429 int cmd_size, bool acquire, bool wfi)
430{ 430{
431 u32 off = cmd->off; 431 int ch = c->hw_chid;
432 u32 ob, off = cmd->off;
432 u64 va; 433 u64 va;
433 434
435 ob = off;
436
434 /* 437 /*
435 * RO for acquire (since we just need to read the mem) and RW for 438 * RO for acquire (since we just need to read the mem) and RW for
436 * release since we will need to write back to the semaphore memory. 439 * release since we will need to write back to the semaphore memory.
@@ -480,6 +483,19 @@ static void add_sema_cmd(struct gk20a *g, struct channel_gk20a *c,
480 /* ignored */ 483 /* ignored */
481 gk20a_mem_wr32(g, cmd->mem, off++, 0); 484 gk20a_mem_wr32(g, cmd->mem, off++, 0);
482 } 485 }
486
487 if (acquire)
488 gpu_sema_verbose_dbg("(A) c=%d ACQ_GE %-4u owner=%-3d"
489 "va=0x%llx cmd_mem=0x%llx b=0x%llx off=%u",
490 ch, gk20a_semaphore_get_value(s),
491 s->hw_sema->ch->hw_chid, va, cmd->gva,
492 cmd->mem->gpu_va, ob);
493 else
494 gpu_sema_verbose_dbg("(R) c=%d INCR %u (%u) va=0x%llx "
495 "cmd_mem=0x%llx b=0x%llx off=%u",
496 ch, gk20a_semaphore_get_value(s),
497 readl(s->hw_sema->value), va, cmd->gva,
498 cmd->mem->gpu_va, ob);
483} 499}
484 500
485static int gk20a_channel_semaphore_wait_syncpt( 501static int gk20a_channel_semaphore_wait_syncpt(