diff options
Diffstat (limited to 'drivers/gpu/nvgpu/gk20a/channel_sync_gk20a.c')
-rw-r--r-- | drivers/gpu/nvgpu/gk20a/channel_sync_gk20a.c | 21 |
1 files changed, 11 insertions, 10 deletions
diff --git a/drivers/gpu/nvgpu/gk20a/channel_sync_gk20a.c b/drivers/gpu/nvgpu/gk20a/channel_sync_gk20a.c index 45d9ae9c..4b1be8b9 100644 --- a/drivers/gpu/nvgpu/gk20a/channel_sync_gk20a.c +++ b/drivers/gpu/nvgpu/gk20a/channel_sync_gk20a.c | |||
@@ -494,7 +494,7 @@ static void gk20a_channel_semaphore_launcher( | |||
494 | "wait completed (%d) for fence %p '%s', triggering gpu work", | 494 | "wait completed (%d) for fence %p '%s', triggering gpu work", |
495 | err, fence, fence->name); | 495 | err, fence, fence->name); |
496 | sync_fence_put(fence); | 496 | sync_fence_put(fence); |
497 | nvgpu_semaphore_release(w->sema); | 497 | nvgpu_semaphore_release(w->sema, w->ch->hw_sema); |
498 | nvgpu_semaphore_put(w->sema); | 498 | nvgpu_semaphore_put(w->sema); |
499 | nvgpu_kfree(g, w); | 499 | nvgpu_kfree(g, w); |
500 | } | 500 | } |
@@ -522,7 +522,7 @@ static void add_sema_cmd(struct gk20a *g, struct channel_gk20a *c, | |||
522 | * incr the underlying sema next_value. | 522 | * incr the underlying sema next_value. |
523 | */ | 523 | */ |
524 | if (!acquire) | 524 | if (!acquire) |
525 | nvgpu_semaphore_incr(s); | 525 | nvgpu_semaphore_incr(s, c->hw_sema); |
526 | 526 | ||
527 | /* semaphore_a */ | 527 | /* semaphore_a */ |
528 | nvgpu_mem_wr32(g, cmd->mem, off++, 0x20010004); | 528 | nvgpu_mem_wr32(g, cmd->mem, off++, 0x20010004); |
@@ -561,17 +561,18 @@ static void add_sema_cmd(struct gk20a *g, struct channel_gk20a *c, | |||
561 | } | 561 | } |
562 | 562 | ||
563 | if (acquire) | 563 | if (acquire) |
564 | gpu_sema_verbose_dbg(g, "(A) c=%d ACQ_GE %-4u owner=%-3d" | 564 | gpu_sema_verbose_dbg(g, "(A) c=%d ACQ_GE %-4u pool=%-3d" |
565 | "va=0x%llx cmd_mem=0x%llx b=0x%llx off=%u", | 565 | "va=0x%llx cmd_mem=0x%llx b=0x%llx off=%u", |
566 | ch, nvgpu_semaphore_get_value(s), | 566 | ch, nvgpu_semaphore_get_value(s), |
567 | s->hw_sema->ch->chid, va, cmd->gva, | 567 | s->location.pool->page_idx, va, cmd->gva, |
568 | cmd->mem->gpu_va, ob); | 568 | cmd->mem->gpu_va, ob); |
569 | else | 569 | else |
570 | gpu_sema_verbose_dbg(g, "(R) c=%d INCR %u (%u) va=0x%llx " | 570 | gpu_sema_verbose_dbg(g, "(R) c=%d INCR %u (%u) pool=%-3d" |
571 | "cmd_mem=0x%llx b=0x%llx off=%u", | 571 | "va=0x%llx cmd_mem=0x%llx b=0x%llx off=%u", |
572 | ch, nvgpu_semaphore_get_value(s), | 572 | ch, nvgpu_semaphore_get_value(s), |
573 | nvgpu_semaphore_read(s), va, cmd->gva, | 573 | nvgpu_semaphore_read(s), |
574 | cmd->mem->gpu_va, ob); | 574 | s->location.pool->page_idx, |
575 | va, cmd->gva, cmd->mem->gpu_va, ob); | ||
575 | } | 576 | } |
576 | 577 | ||
577 | static int gk20a_channel_semaphore_wait_syncpt( | 578 | static int gk20a_channel_semaphore_wait_syncpt( |
@@ -714,7 +715,7 @@ static int gk20a_channel_semaphore_wait_fd( | |||
714 | 715 | ||
715 | /* worker takes one reference */ | 716 | /* worker takes one reference */ |
716 | nvgpu_semaphore_get(w->sema); | 717 | nvgpu_semaphore_get(w->sema); |
717 | nvgpu_semaphore_incr(w->sema); | 718 | nvgpu_semaphore_incr(w->sema, c->hw_sema); |
718 | 719 | ||
719 | /* GPU unblocked when the semaphore value increments. */ | 720 | /* GPU unblocked when the semaphore value increments. */ |
720 | add_sema_cmd(c->g, c, w->sema, wait_cmd, 8, true, false); | 721 | add_sema_cmd(c->g, c, w->sema, wait_cmd, 8, true, false); |
@@ -740,7 +741,7 @@ static int gk20a_channel_semaphore_wait_fd( | |||
740 | */ | 741 | */ |
741 | if (ret == 1) { | 742 | if (ret == 1) { |
742 | sync_fence_put(sync_fence); | 743 | sync_fence_put(sync_fence); |
743 | nvgpu_semaphore_release(w->sema); | 744 | nvgpu_semaphore_release(w->sema, c->hw_sema); |
744 | nvgpu_semaphore_put(w->sema); | 745 | nvgpu_semaphore_put(w->sema); |
745 | } | 746 | } |
746 | 747 | ||