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Diffstat (limited to 'drivers/gpu/nvgpu/gk20a/ce2_gk20a.c')
-rw-r--r--drivers/gpu/nvgpu/gk20a/ce2_gk20a.c5
1 files changed, 3 insertions, 2 deletions
diff --git a/drivers/gpu/nvgpu/gk20a/ce2_gk20a.c b/drivers/gpu/nvgpu/gk20a/ce2_gk20a.c
index 5e2fc6b3..ec20a679 100644
--- a/drivers/gpu/nvgpu/gk20a/ce2_gk20a.c
+++ b/drivers/gpu/nvgpu/gk20a/ce2_gk20a.c
@@ -504,7 +504,7 @@ u32 gk20a_ce_create_context(struct gk20a *g,
504 504
505 /* -1 means default channel timeslice value */ 505 /* -1 means default channel timeslice value */
506 if (timeslice != -1) { 506 if (timeslice != -1) {
507 err = gk20a_fifo_set_timeslice(ce_ctx->ch, timeslice); 507 err = gk20a_fifo_tsg_set_timeslice(ce_ctx->tsg, timeslice);
508 if (err) { 508 if (err) {
509 nvgpu_err(g, 509 nvgpu_err(g,
510 "ce: could not set the channel timeslice value for CE context"); 510 "ce: could not set the channel timeslice value for CE context");
@@ -514,7 +514,8 @@ u32 gk20a_ce_create_context(struct gk20a *g,
514 514
515 /* -1 means default channel runlist level */ 515 /* -1 means default channel runlist level */
516 if (runlist_level != -1) { 516 if (runlist_level != -1) {
517 err = gk20a_channel_set_runlist_interleave(ce_ctx->ch, runlist_level); 517 err = gk20a_tsg_set_runlist_interleave(ce_ctx->tsg,
518 runlist_level);
518 if (err) { 519 if (err) {
519 nvgpu_err(g, 520 nvgpu_err(g,
520 "ce: could not set the runlist interleave for CE context"); 521 "ce: could not set the runlist interleave for CE context");