summaryrefslogtreecommitdiffstats
path: root/drivers/gpu/nvgpu/gk20a/cde_gk20a.h
diff options
context:
space:
mode:
Diffstat (limited to 'drivers/gpu/nvgpu/gk20a/cde_gk20a.h')
-rw-r--r--drivers/gpu/nvgpu/gk20a/cde_gk20a.h20
1 files changed, 14 insertions, 6 deletions
diff --git a/drivers/gpu/nvgpu/gk20a/cde_gk20a.h b/drivers/gpu/nvgpu/gk20a/cde_gk20a.h
index a5c75ae8..fc5736ad 100644
--- a/drivers/gpu/nvgpu/gk20a/cde_gk20a.h
+++ b/drivers/gpu/nvgpu/gk20a/cde_gk20a.h
@@ -1,7 +1,7 @@
1/* 1/*
2 * GK20A color decompression engine support 2 * GK20A color decompression engine support
3 * 3 *
4 * Copyright (c) 2014, NVIDIA Corporation. All rights reserved. 4 * Copyright (c) 2014-2015, NVIDIA Corporation. All rights reserved.
5 * 5 *
6 * This program is free software; you can redistribute it and/or modify it 6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms and conditions of the GNU General Public License, 7 * under the terms and conditions of the GNU General Public License,
@@ -129,6 +129,8 @@ enum {
129 TYPE_PARAM_SOURCE_SMMU_ADDR, 129 TYPE_PARAM_SOURCE_SMMU_ADDR,
130 TYPE_PARAM_BACKINGSTORE_BASE_HW, 130 TYPE_PARAM_BACKINGSTORE_BASE_HW,
131 TYPE_PARAM_GOBS_PER_COMPTAGLINE_PER_SLICE, 131 TYPE_PARAM_GOBS_PER_COMPTAGLINE_PER_SLICE,
132 TYPE_PARAM_SCATTERBUFFER,
133 TYPE_PARAM_SCATTERBUFFER_SIZE,
132 NUM_RESERVED_PARAMS = 1024, 134 NUM_RESERVED_PARAMS = 1024,
133}; 135};
134 136
@@ -237,6 +239,9 @@ struct gk20a_cde_ctx {
237 u64 compbit_vaddr; 239 u64 compbit_vaddr;
238 u64 compbit_size; 240 u64 compbit_size;
239 241
242 u64 scatterbuffer_vaddr;
243 u64 scatterbuffer_size;
244
240 u64 backing_store_vaddr; 245 u64 backing_store_vaddr;
241 246
242 struct nvgpu_gpfifo *init_convert_cmd; 247 struct nvgpu_gpfifo *init_convert_cmd;
@@ -276,16 +281,19 @@ void gk20a_cde_destroy(struct gk20a *g);
276void gk20a_cde_suspend(struct gk20a *g); 281void gk20a_cde_suspend(struct gk20a *g);
277int gk20a_init_cde_support(struct gk20a *g); 282int gk20a_init_cde_support(struct gk20a *g);
278int gk20a_cde_reload(struct gk20a *g); 283int gk20a_cde_reload(struct gk20a *g);
279int gk20a_cde_convert(struct gk20a *g, struct dma_buf *compbits_buf, 284int gk20a_cde_convert(struct gk20a *g,
280 s32 compbits_kind, u64 compbits_word_offset, 285 struct dma_buf *compbits_buf,
281 u32 compbits_size, struct nvgpu_fence *fence, 286 u64 compbits_byte_offset,
282 u32 __flags, struct gk20a_cde_param *params, 287 u64 scatterbuffer_byte_offset,
283 int num_params, struct gk20a_fence **fence_out); 288 struct nvgpu_fence *fence,
289 u32 __flags, struct gk20a_cde_param *params,
290 int num_params, struct gk20a_fence **fence_out);
284void gk20a_cde_debugfs_init(struct platform_device *dev); 291void gk20a_cde_debugfs_init(struct platform_device *dev);
285 292
286int gk20a_prepare_compressible_read( 293int gk20a_prepare_compressible_read(
287 struct gk20a *g, u32 buffer_fd, u32 request, u64 offset, 294 struct gk20a *g, u32 buffer_fd, u32 request, u64 offset,
288 u64 compbits_hoffset, u64 compbits_voffset, 295 u64 compbits_hoffset, u64 compbits_voffset,
296 u64 scatterbuffer_offset,
289 u32 width, u32 height, u32 block_height_log2, 297 u32 width, u32 height, u32 block_height_log2,
290 u32 submit_flags, struct nvgpu_fence *fence, 298 u32 submit_flags, struct nvgpu_fence *fence,
291 u32 *valid_compbits, u32 *zbc_color, 299 u32 *valid_compbits, u32 *zbc_color,