diff options
Diffstat (limited to 'drivers/gpu/nvgpu/gk20a/cde_gk20a.h')
-rw-r--r-- | drivers/gpu/nvgpu/gk20a/cde_gk20a.h | 45 |
1 files changed, 33 insertions, 12 deletions
diff --git a/drivers/gpu/nvgpu/gk20a/cde_gk20a.h b/drivers/gpu/nvgpu/gk20a/cde_gk20a.h index 3347490c..b160162c 100644 --- a/drivers/gpu/nvgpu/gk20a/cde_gk20a.h +++ b/drivers/gpu/nvgpu/gk20a/cde_gk20a.h | |||
@@ -23,8 +23,9 @@ | |||
23 | 23 | ||
24 | #define MAX_CDE_BUFS 10 | 24 | #define MAX_CDE_BUFS 10 |
25 | #define MAX_CDE_PARAMS 64 | 25 | #define MAX_CDE_PARAMS 64 |
26 | #define MAX_CDE_USER_PARAMS 32 | 26 | #define MAX_CDE_USER_PARAMS 40 |
27 | #define MAX_CDE_OBJ_IDS 4 | 27 | #define MAX_CDE_OBJ_IDS 4 |
28 | #define MAX_CDE_ARRAY_ENTRIES 9 | ||
28 | 29 | ||
29 | /* | 30 | /* |
30 | * The size of the context ring buffer that is dedicated for handling cde | 31 | * The size of the context ring buffer that is dedicated for handling cde |
@@ -162,6 +163,22 @@ struct gk20a_cde_cmd_elem { | |||
162 | }; | 163 | }; |
163 | 164 | ||
164 | /* | 165 | /* |
166 | * This element is used for storing a small array of data. | ||
167 | */ | ||
168 | |||
169 | enum { | ||
170 | ARRAY_PROGRAM_OFFSET = 0, | ||
171 | ARRAY_REGISTER_COUNT, | ||
172 | ARRAY_LAUNCH_COMMAND, | ||
173 | NUM_CDE_ARRAYS | ||
174 | }; | ||
175 | |||
176 | struct gk20a_cde_hdr_array { | ||
177 | u32 id; | ||
178 | u32 data[MAX_CDE_ARRAY_ENTRIES]; | ||
179 | }; | ||
180 | |||
181 | /* | ||
165 | * Following defines a single header element. Each element has a type and | 182 | * Following defines a single header element. Each element has a type and |
166 | * some of the data structures. | 183 | * some of the data structures. |
167 | */ | 184 | */ |
@@ -175,6 +192,7 @@ struct gk20a_cde_hdr_elem { | |||
175 | struct gk20a_cde_hdr_param param; | 192 | struct gk20a_cde_hdr_param param; |
176 | u32 required_class; | 193 | u32 required_class; |
177 | struct gk20a_cde_hdr_command command; | 194 | struct gk20a_cde_hdr_command command; |
195 | struct gk20a_cde_hdr_array array; | ||
178 | }; | 196 | }; |
179 | }; | 197 | }; |
180 | 198 | ||
@@ -183,7 +201,8 @@ enum { | |||
183 | TYPE_REPLACE, | 201 | TYPE_REPLACE, |
184 | TYPE_PARAM, | 202 | TYPE_PARAM, |
185 | TYPE_REQUIRED_CLASS, | 203 | TYPE_REQUIRED_CLASS, |
186 | TYPE_COMMAND | 204 | TYPE_COMMAND, |
205 | TYPE_ARRAY | ||
187 | }; | 206 | }; |
188 | 207 | ||
189 | struct gk20a_cde_mem_desc { | 208 | struct gk20a_cde_mem_desc { |
@@ -219,14 +238,12 @@ struct gk20a_cde_ctx { | |||
219 | /* storage for user space parameter values */ | 238 | /* storage for user space parameter values */ |
220 | u32 user_param_values[MAX_CDE_USER_PARAMS]; | 239 | u32 user_param_values[MAX_CDE_USER_PARAMS]; |
221 | 240 | ||
222 | u64 src_smmu_addr; | 241 | u32 surf_param_offset; |
223 | u32 src_param_offset; | 242 | u32 surf_param_lines; |
224 | u32 src_param_lines; | 243 | u64 surf_vaddr; |
225 | 244 | ||
226 | u64 src_vaddr; | 245 | u64 compbit_vaddr; |
227 | 246 | u64 compbit_size; | |
228 | u64 dest_vaddr; | ||
229 | u64 dest_size; | ||
230 | 247 | ||
231 | u32 obj_ids[MAX_CDE_OBJ_IDS]; | 248 | u32 obj_ids[MAX_CDE_OBJ_IDS]; |
232 | int num_obj_ids; | 249 | int num_obj_ids; |
@@ -259,6 +276,10 @@ struct gk20a_cde_app { | |||
259 | int ctx_usecount; | 276 | int ctx_usecount; |
260 | int ctx_count_top; | 277 | int ctx_count_top; |
261 | 278 | ||
279 | u32 firmware_version; | ||
280 | |||
281 | u32 arrays[NUM_CDE_ARRAYS][MAX_CDE_ARRAY_ENTRIES]; | ||
282 | |||
262 | u32 shader_parameter; | 283 | u32 shader_parameter; |
263 | }; | 284 | }; |
264 | 285 | ||
@@ -266,9 +287,9 @@ void gk20a_cde_destroy(struct gk20a *g); | |||
266 | void gk20a_cde_suspend(struct gk20a *g); | 287 | void gk20a_cde_suspend(struct gk20a *g); |
267 | int gk20a_init_cde_support(struct gk20a *g); | 288 | int gk20a_init_cde_support(struct gk20a *g); |
268 | int gk20a_cde_reload(struct gk20a *g); | 289 | int gk20a_cde_reload(struct gk20a *g); |
269 | int gk20a_cde_convert(struct gk20a *g, struct dma_buf *dst, | 290 | int gk20a_cde_convert(struct gk20a *g, struct dma_buf *compbits_buf, |
270 | s32 dst_kind, u64 dst_word_offset, | 291 | s32 compbits_kind, u64 compbits_word_offset, |
271 | u32 dst_size, struct nvgpu_fence *fence, | 292 | u32 compbits_size, struct nvgpu_fence *fence, |
272 | u32 __flags, struct gk20a_cde_param *params, | 293 | u32 __flags, struct gk20a_cde_param *params, |
273 | int num_params, struct gk20a_fence **fence_out); | 294 | int num_params, struct gk20a_fence **fence_out); |
274 | void gk20a_cde_debugfs_init(struct platform_device *dev); | 295 | void gk20a_cde_debugfs_init(struct platform_device *dev); |