diff options
Diffstat (limited to 'drivers/gpu/nvgpu/ctrl/ctrlvolt.h')
-rw-r--r-- | drivers/gpu/nvgpu/ctrl/ctrlvolt.h | 60 |
1 files changed, 30 insertions, 30 deletions
diff --git a/drivers/gpu/nvgpu/ctrl/ctrlvolt.h b/drivers/gpu/nvgpu/ctrl/ctrlvolt.h index ea06dbc4..84994eb6 100644 --- a/drivers/gpu/nvgpu/ctrl/ctrlvolt.h +++ b/drivers/gpu/nvgpu/ctrl/ctrlvolt.h | |||
@@ -30,25 +30,25 @@ | |||
30 | #include "ctrlperf.h" | 30 | #include "ctrlperf.h" |
31 | #include "ctrlboardobj.h" | 31 | #include "ctrlboardobj.h" |
32 | 32 | ||
33 | #define CTRL_VOLT_RAIL_VOLT_DELTA_MAX_ENTRIES 0x04 | 33 | #define CTRL_VOLT_RAIL_VOLT_DELTA_MAX_ENTRIES 0x04U |
34 | #define CTRL_VOLT_VOLT_DEV_VID_VSEL_MAX_ENTRIES (8) | 34 | #define CTRL_VOLT_VOLT_DEV_VID_VSEL_MAX_ENTRIES (8U) |
35 | #define CTRL_VOLT_DOMAIN_INVALID 0x00 | 35 | #define CTRL_VOLT_DOMAIN_INVALID 0x00U |
36 | #define CTRL_VOLT_DOMAIN_LOGIC 0x01 | 36 | #define CTRL_VOLT_DOMAIN_LOGIC 0x01U |
37 | #define CLK_PROG_VFE_ENTRY_LOGIC 0x00 | 37 | #define CLK_PROG_VFE_ENTRY_LOGIC 0x00U |
38 | #define CLK_PROG_VFE_ENTRY_SRAM 0x01 | 38 | #define CLK_PROG_VFE_ENTRY_SRAM 0x01U |
39 | 39 | ||
40 | /* | 40 | /* |
41 | * Macros for Voltage Domain HAL. | 41 | * Macros for Voltage Domain HAL. |
42 | */ | 42 | */ |
43 | #define CTRL_VOLT_DOMAIN_HAL_GP10X_SINGLE_RAIL 0x00 | 43 | #define CTRL_VOLT_DOMAIN_HAL_GP10X_SINGLE_RAIL 0x00U |
44 | #define CTRL_VOLT_DOMAIN_HAL_GP10X_SPLIT_RAIL 0x01 | 44 | #define CTRL_VOLT_DOMAIN_HAL_GP10X_SPLIT_RAIL 0x01U |
45 | 45 | ||
46 | /* | 46 | /* |
47 | * Macros for Voltage Domains. | 47 | * Macros for Voltage Domains. |
48 | */ | 48 | */ |
49 | #define CTRL_VOLT_DOMAIN_INVALID 0x00 | 49 | #define CTRL_VOLT_DOMAIN_INVALID 0x00U |
50 | #define CTRL_VOLT_DOMAIN_LOGIC 0x01 | 50 | #define CTRL_VOLT_DOMAIN_LOGIC 0x01U |
51 | #define CTRL_VOLT_DOMAIN_SRAM 0x02 | 51 | #define CTRL_VOLT_DOMAIN_SRAM 0x02U |
52 | 52 | ||
53 | /*! | 53 | /*! |
54 | * Special value corresponding to an invalid Voltage Rail Index. | 54 | * Special value corresponding to an invalid Voltage Rail Index. |
@@ -79,43 +79,43 @@ enum nv_pmu_pmgr_pwm_source { | |||
79 | /*! | 79 | /*! |
80 | * Macros for Voltage Device Types. | 80 | * Macros for Voltage Device Types. |
81 | */ | 81 | */ |
82 | #define CTRL_VOLT_DEVICE_TYPE_INVALID 0x00 | 82 | #define CTRL_VOLT_DEVICE_TYPE_INVALID 0x00U |
83 | #define CTRL_VOLT_DEVICE_TYPE_PWM 0x03 | 83 | #define CTRL_VOLT_DEVICE_TYPE_PWM 0x03U |
84 | 84 | ||
85 | /* | 85 | /* |
86 | * Macros for Volt Device Operation types. | 86 | * Macros for Volt Device Operation types. |
87 | */ | 87 | */ |
88 | #define CTRL_VOLT_DEVICE_OPERATION_TYPE_INVALID 0x00 | 88 | #define CTRL_VOLT_DEVICE_OPERATION_TYPE_INVALID 0x00U |
89 | #define CTRL_VOLT_DEVICE_OPERATION_TYPE_DEFAULT 0x01 | 89 | #define CTRL_VOLT_DEVICE_OPERATION_TYPE_DEFAULT 0x01U |
90 | #define CTRL_VOLT_DEVICE_OPERATION_TYPE_LPWR_STEADY_STATE 0x02 | 90 | #define CTRL_VOLT_DEVICE_OPERATION_TYPE_LPWR_STEADY_STATE 0x02U |
91 | #define CTRL_VOLT_DEVICE_OPERATION_TYPE_LPWR_SLEEP_STATE 0x03 | 91 | #define CTRL_VOLT_DEVICE_OPERATION_TYPE_LPWR_SLEEP_STATE 0x03U |
92 | #define CTRL_VOLT_VOLT_DEVICE_OPERATION_TYPE_IPC_VMIN 0x04 | 92 | #define CTRL_VOLT_VOLT_DEVICE_OPERATION_TYPE_IPC_VMIN 0x04U |
93 | 93 | ||
94 | /*! | 94 | /*! |
95 | * Macros for Voltage Domains. | 95 | * Macros for Voltage Domains. |
96 | */ | 96 | */ |
97 | #define CTRL_VOLT_DOMAIN_INVALID 0x00 | 97 | #define CTRL_VOLT_DOMAIN_INVALID 0x00U |
98 | #define CTRL_VOLT_DOMAIN_LOGIC 0x01 | 98 | #define CTRL_VOLT_DOMAIN_LOGIC 0x01U |
99 | #define CTRL_VOLT_DOMAIN_SRAM 0x02 | 99 | #define CTRL_VOLT_DOMAIN_SRAM 0x02U |
100 | 100 | ||
101 | /*! | 101 | /*! |
102 | * Macros for Volt Policy types. | 102 | * Macros for Volt Policy types. |
103 | * | 103 | * |
104 | * Virtual VOLT_POLICY types are indexed starting from 0xFF. | 104 | * Virtual VOLT_POLICY types are indexed starting from 0xFF. |
105 | */ | 105 | */ |
106 | #define CTRL_VOLT_POLICY_TYPE_INVALID 0x00 | 106 | #define CTRL_VOLT_POLICY_TYPE_INVALID 0x00U |
107 | #define CTRL_VOLT_POLICY_TYPE_SINGLE_RAIL 0x01 | 107 | #define CTRL_VOLT_POLICY_TYPE_SINGLE_RAIL 0x01U |
108 | #define CTRL_VOLT_POLICY_TYPE_SR_MULTI_STEP 0x02 | 108 | #define CTRL_VOLT_POLICY_TYPE_SR_MULTI_STEP 0x02U |
109 | #define CTRL_VOLT_POLICY_TYPE_SR_SINGLE_STEP 0x03 | 109 | #define CTRL_VOLT_POLICY_TYPE_SR_SINGLE_STEP 0x03U |
110 | #define CTRL_VOLT_POLICY_TYPE_SINGLE_RAIL_MULTI_STEP 0x04 | 110 | #define CTRL_VOLT_POLICY_TYPE_SINGLE_RAIL_MULTI_STEP 0x04U |
111 | #define CTRL_VOLT_POLICY_TYPE_SPLIT_RAIL 0xFE | 111 | #define CTRL_VOLT_POLICY_TYPE_SPLIT_RAIL 0xFEU |
112 | #define CTRL_VOLT_POLICY_TYPE_UNKNOWN 0xFF | 112 | #define CTRL_VOLT_POLICY_TYPE_UNKNOWN 0xFFU |
113 | 113 | ||
114 | /*! | 114 | /*! |
115 | * Macros for Volt Policy Client types. | 115 | * Macros for Volt Policy Client types. |
116 | */ | 116 | */ |
117 | #define CTRL_VOLT_POLICY_CLIENT_INVALID 0x00 | 117 | #define CTRL_VOLT_POLICY_CLIENT_INVALID 0x00U |
118 | #define CTRL_VOLT_POLICY_CLIENT_PERF_CORE_VF_SEQ 0x01 | 118 | #define CTRL_VOLT_POLICY_CLIENT_PERF_CORE_VF_SEQ 0x01U |
119 | 119 | ||
120 | struct ctrl_volt_volt_rail_list_item { | 120 | struct ctrl_volt_volt_rail_list_item { |
121 | u8 rail_idx; | 121 | u8 rail_idx; |