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Diffstat (limited to 'drivers/gpu/nvgpu/ctrl/ctrlvolt.h')
-rw-r--r--drivers/gpu/nvgpu/ctrl/ctrlvolt.h15
1 files changed, 14 insertions, 1 deletions
diff --git a/drivers/gpu/nvgpu/ctrl/ctrlvolt.h b/drivers/gpu/nvgpu/ctrl/ctrlvolt.h
index c99aa79f..1a82fbed 100644
--- a/drivers/gpu/nvgpu/ctrl/ctrlvolt.h
+++ b/drivers/gpu/nvgpu/ctrl/ctrlvolt.h
@@ -1,7 +1,7 @@
1/* 1/*
2 * general p state infrastructure 2 * general p state infrastructure
3 * 3 *
4 * Copyright (c) 2016, NVIDIA CORPORATION. All rights reserved. 4 * Copyright (c) 2016-2018, NVIDIA CORPORATION. All rights reserved.
5 * 5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a 6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"), 7 * copy of this software and associated documentation files (the "Software"),
@@ -89,6 +89,7 @@ enum nv_pmu_pmgr_pwm_source {
89#define CTRL_VOLT_DEVICE_OPERATION_TYPE_DEFAULT 0x01 89#define CTRL_VOLT_DEVICE_OPERATION_TYPE_DEFAULT 0x01
90#define CTRL_VOLT_DEVICE_OPERATION_TYPE_LPWR_STEADY_STATE 0x02 90#define CTRL_VOLT_DEVICE_OPERATION_TYPE_LPWR_STEADY_STATE 0x02
91#define CTRL_VOLT_DEVICE_OPERATION_TYPE_LPWR_SLEEP_STATE 0x03 91#define CTRL_VOLT_DEVICE_OPERATION_TYPE_LPWR_SLEEP_STATE 0x03
92#define CTRL_VOLT_VOLT_DEVICE_OPERATION_TYPE_IPC_VMIN 0x04
92 93
93/*! 94/*!
94 * Macros for Voltage Domains. 95 * Macros for Voltage Domains.
@@ -126,4 +127,16 @@ struct ctrl_volt_volt_rail_list {
126 rails[CTRL_VOLT_VOLT_RAIL_MAX_RAILS]; 127 rails[CTRL_VOLT_VOLT_RAIL_MAX_RAILS];
127}; 128};
128 129
130struct ctrl_volt_volt_rail_list_item_v1 {
131 u8 rail_idx;
132 u32 voltage_uv;
133 u32 voltage_min_noise_unaware_uv;
134};
135
136struct ctrl_volt_volt_rail_list_v1 {
137 u8 num_rails;
138 struct ctrl_volt_volt_rail_list_item_v1
139 rails[CTRL_VOLT_VOLT_RAIL_MAX_RAILS];
140};
141
129#endif 142#endif