diff options
Diffstat (limited to 'drivers/gpu/nvgpu/ctrl/ctrlpmgr.h')
-rw-r--r-- | drivers/gpu/nvgpu/ctrl/ctrlpmgr.h | 26 |
1 files changed, 13 insertions, 13 deletions
diff --git a/drivers/gpu/nvgpu/ctrl/ctrlpmgr.h b/drivers/gpu/nvgpu/ctrl/ctrlpmgr.h index 165bbd5d..90f6501b 100644 --- a/drivers/gpu/nvgpu/ctrl/ctrlpmgr.h +++ b/drivers/gpu/nvgpu/ctrl/ctrlpmgr.h | |||
@@ -27,23 +27,23 @@ | |||
27 | #include "ctrlboardobj.h" | 27 | #include "ctrlboardobj.h" |
28 | 28 | ||
29 | /* valid power domain values */ | 29 | /* valid power domain values */ |
30 | #define CTRL_PMGR_PWR_DEVICES_MAX_DEVICES 32 | 30 | #define CTRL_PMGR_PWR_DEVICES_MAX_DEVICES 32U |
31 | #define CTRL_PMGR_PWR_VIOLATION_MAX 0x06 | 31 | #define CTRL_PMGR_PWR_VIOLATION_MAX 0x06U |
32 | 32 | ||
33 | #define CTRL_PMGR_PWR_DEVICE_TYPE_INA3221 0x4E | 33 | #define CTRL_PMGR_PWR_DEVICE_TYPE_INA3221 0x4EU |
34 | 34 | ||
35 | #define CTRL_PMGR_PWR_CHANNEL_INDEX_INVALID 0xFF | 35 | #define CTRL_PMGR_PWR_CHANNEL_INDEX_INVALID 0xFFU |
36 | #define CTRL_PMGR_PWR_CHANNEL_TYPE_SENSOR 0x08 | 36 | #define CTRL_PMGR_PWR_CHANNEL_TYPE_SENSOR 0x08U |
37 | 37 | ||
38 | #define CTRL_PMGR_PWR_POLICY_TABLE_VERSION_3X 0x30 | 38 | #define CTRL_PMGR_PWR_POLICY_TABLE_VERSION_3X 0x30U |
39 | #define CTRL_PMGR_PWR_POLICY_TYPE_HW_THRESHOLD 0x04 | 39 | #define CTRL_PMGR_PWR_POLICY_TYPE_HW_THRESHOLD 0x04U |
40 | #define CTRL_PMGR_PWR_POLICY_TYPE_SW_THRESHOLD 0x0C | 40 | #define CTRL_PMGR_PWR_POLICY_TYPE_SW_THRESHOLD 0x0CU |
41 | 41 | ||
42 | #define CTRL_PMGR_PWR_POLICY_MAX_LIMIT_INPUTS 0x8 | 42 | #define CTRL_PMGR_PWR_POLICY_MAX_LIMIT_INPUTS 0x8U |
43 | #define CTRL_PMGR_PWR_POLICY_IDX_NUM_INDEXES 0x08 | 43 | #define CTRL_PMGR_PWR_POLICY_IDX_NUM_INDEXES 0x08U |
44 | #define CTRL_PMGR_PWR_POLICY_INDEX_INVALID 0xFF | 44 | #define CTRL_PMGR_PWR_POLICY_INDEX_INVALID 0xFFU |
45 | #define CTRL_PMGR_PWR_POLICY_LIMIT_INPUT_CLIENT_IDX_RM 0xFE | 45 | #define CTRL_PMGR_PWR_POLICY_LIMIT_INPUT_CLIENT_IDX_RM 0xFEU |
46 | #define CTRL_PMGR_PWR_POLICY_LIMIT_MAX (0xFFFFFFFF) | 46 | #define CTRL_PMGR_PWR_POLICY_LIMIT_MAX (0xFFFFFFFFU) |
47 | 47 | ||
48 | struct ctrl_pmgr_pwr_device_info_rshunt { | 48 | struct ctrl_pmgr_pwr_device_info_rshunt { |
49 | bool use_fxp8_8; | 49 | bool use_fxp8_8; |