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-rw-r--r--drivers/gpu/nvgpu/common/linux/vgpu/fifo_vgpu.h1
-rw-r--r--drivers/gpu/nvgpu/common/linux/vgpu/gv11b/vgpu_hal_gv11b.c1
-rw-r--r--drivers/gpu/nvgpu/common/linux/vgpu/tsg_vgpu.c22
3 files changed, 23 insertions, 1 deletions
diff --git a/drivers/gpu/nvgpu/common/linux/vgpu/fifo_vgpu.h b/drivers/gpu/nvgpu/common/linux/vgpu/fifo_vgpu.h
index 62a3a256..5aefb356 100644
--- a/drivers/gpu/nvgpu/common/linux/vgpu/fifo_vgpu.h
+++ b/drivers/gpu/nvgpu/common/linux/vgpu/fifo_vgpu.h
@@ -50,6 +50,7 @@ int vgpu_fifo_force_reset_ch(struct channel_gk20a *ch,
50 u32 err_code, bool verbose); 50 u32 err_code, bool verbose);
51u32 vgpu_fifo_default_timeslice_us(struct gk20a *g); 51u32 vgpu_fifo_default_timeslice_us(struct gk20a *g);
52int vgpu_tsg_open(struct tsg_gk20a *tsg); 52int vgpu_tsg_open(struct tsg_gk20a *tsg);
53void vgpu_tsg_release(struct tsg_gk20a *tsg);
53int vgpu_tsg_bind_channel(struct tsg_gk20a *tsg, 54int vgpu_tsg_bind_channel(struct tsg_gk20a *tsg,
54 struct channel_gk20a *ch); 55 struct channel_gk20a *ch);
55int vgpu_tsg_unbind_channel(struct channel_gk20a *ch); 56int vgpu_tsg_unbind_channel(struct channel_gk20a *ch);
diff --git a/drivers/gpu/nvgpu/common/linux/vgpu/gv11b/vgpu_hal_gv11b.c b/drivers/gpu/nvgpu/common/linux/vgpu/gv11b/vgpu_hal_gv11b.c
index 7d60bfb2..079b4cb9 100644
--- a/drivers/gpu/nvgpu/common/linux/vgpu/gv11b/vgpu_hal_gv11b.c
+++ b/drivers/gpu/nvgpu/common/linux/vgpu/gv11b/vgpu_hal_gv11b.c
@@ -355,6 +355,7 @@ static const struct gpu_ops vgpu_gv11b_ops = {
355 .set_runlist_interleave = vgpu_fifo_set_runlist_interleave, 355 .set_runlist_interleave = vgpu_fifo_set_runlist_interleave,
356 .tsg_set_timeslice = vgpu_tsg_set_timeslice, 356 .tsg_set_timeslice = vgpu_tsg_set_timeslice,
357 .tsg_open = vgpu_tsg_open, 357 .tsg_open = vgpu_tsg_open,
358 .tsg_release = vgpu_tsg_release,
358 .force_reset_ch = vgpu_fifo_force_reset_ch, 359 .force_reset_ch = vgpu_fifo_force_reset_ch,
359 .engine_enum_from_type = gp10b_fifo_engine_enum_from_type, 360 .engine_enum_from_type = gp10b_fifo_engine_enum_from_type,
360 .device_info_data_parse = gp10b_device_info_data_parse, 361 .device_info_data_parse = gp10b_device_info_data_parse,
diff --git a/drivers/gpu/nvgpu/common/linux/vgpu/tsg_vgpu.c b/drivers/gpu/nvgpu/common/linux/vgpu/tsg_vgpu.c
index c40e6f90..06f52177 100644
--- a/drivers/gpu/nvgpu/common/linux/vgpu/tsg_vgpu.c
+++ b/drivers/gpu/nvgpu/common/linux/vgpu/tsg_vgpu.c
@@ -28,7 +28,7 @@
28int vgpu_tsg_open(struct tsg_gk20a *tsg) 28int vgpu_tsg_open(struct tsg_gk20a *tsg)
29{ 29{
30 struct tegra_vgpu_cmd_msg msg = {}; 30 struct tegra_vgpu_cmd_msg msg = {};
31 struct tegra_vgpu_tsg_open_params *p = 31 struct tegra_vgpu_tsg_open_rel_params *p =
32 &msg.params.tsg_open; 32 &msg.params.tsg_open;
33 int err; 33 int err;
34 34
@@ -47,6 +47,26 @@ int vgpu_tsg_open(struct tsg_gk20a *tsg)
47 return err; 47 return err;
48} 48}
49 49
50void vgpu_tsg_release(struct tsg_gk20a *tsg)
51{
52 struct tegra_vgpu_cmd_msg msg = {};
53 struct tegra_vgpu_tsg_open_rel_params *p =
54 &msg.params.tsg_release;
55 int err;
56
57 gk20a_dbg_fn("");
58
59 msg.cmd = TEGRA_VGPU_CMD_TSG_RELEASE;
60 msg.handle = vgpu_get_handle(tsg->g);
61 p->tsg_id = tsg->tsgid;
62 err = vgpu_comm_sendrecv(&msg, sizeof(msg), sizeof(msg));
63 err = err ? err : msg.ret;
64 if (err) {
65 nvgpu_err(tsg->g,
66 "vgpu_tsg_release failed, tsgid %d", tsg->tsgid);
67 }
68}
69
50int vgpu_enable_tsg(struct tsg_gk20a *tsg) 70int vgpu_enable_tsg(struct tsg_gk20a *tsg)
51{ 71{
52 struct gk20a *g = tsg->g; 72 struct gk20a *g = tsg->g;