diff options
Diffstat (limited to 'drivers/gpu/nvgpu/common')
-rw-r--r-- | drivers/gpu/nvgpu/common/linux/channel.c | 131 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/common/linux/channel.h | 10 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/common/linux/ioctl_channel.c | 35 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/common/linux/vgpu/fifo_vgpu.c | 34 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/common/linux/vgpu/gr_vgpu.c | 25 |
5 files changed, 189 insertions, 46 deletions
diff --git a/drivers/gpu/nvgpu/common/linux/channel.c b/drivers/gpu/nvgpu/common/linux/channel.c index 8366ed88..1ae2d444 100644 --- a/drivers/gpu/nvgpu/common/linux/channel.c +++ b/drivers/gpu/nvgpu/common/linux/channel.c | |||
@@ -17,6 +17,7 @@ | |||
17 | #include <nvgpu/enabled.h> | 17 | #include <nvgpu/enabled.h> |
18 | #include <nvgpu/debug.h> | 18 | #include <nvgpu/debug.h> |
19 | #include <nvgpu/ltc.h> | 19 | #include <nvgpu/ltc.h> |
20 | #include <nvgpu/error_notifier.h> | ||
20 | 21 | ||
21 | /* | 22 | /* |
22 | * This is required for nvgpu_vm_find_buf() which is used in the tracing | 23 | * This is required for nvgpu_vm_find_buf() which is used in the tracing |
@@ -37,6 +38,124 @@ | |||
37 | #include <trace/events/gk20a.h> | 38 | #include <trace/events/gk20a.h> |
38 | #include <uapi/linux/nvgpu.h> | 39 | #include <uapi/linux/nvgpu.h> |
39 | 40 | ||
41 | /* | ||
42 | * API to convert error_notifiers in common code and of the form | ||
43 | * NVGPU_ERR_NOTIFIER_* into Linux specific error_notifiers exposed to user | ||
44 | * space and of the form NVGPU_CHANNEL_* | ||
45 | */ | ||
46 | static u32 nvgpu_error_notifier_to_channel_notifier(u32 error_notifier) | ||
47 | { | ||
48 | switch (error_notifier) { | ||
49 | case NVGPU_ERR_NOTIFIER_FIFO_ERROR_IDLE_TIMEOUT: | ||
50 | return NVGPU_CHANNEL_FIFO_ERROR_IDLE_TIMEOUT; | ||
51 | case NVGPU_ERR_NOTIFIER_GR_ERROR_SW_METHOD: | ||
52 | return NVGPU_CHANNEL_GR_ERROR_SW_METHOD; | ||
53 | case NVGPU_ERR_NOTIFIER_GR_ERROR_SW_NOTIFY: | ||
54 | return NVGPU_CHANNEL_GR_ERROR_SW_NOTIFY; | ||
55 | case NVGPU_ERR_NOTIFIER_GR_EXCEPTION: | ||
56 | return NVGPU_CHANNEL_GR_EXCEPTION; | ||
57 | case NVGPU_ERR_NOTIFIER_GR_SEMAPHORE_TIMEOUT: | ||
58 | return NVGPU_CHANNEL_GR_SEMAPHORE_TIMEOUT; | ||
59 | case NVGPU_ERR_NOTIFIER_GR_ILLEGAL_NOTIFY: | ||
60 | return NVGPU_CHANNEL_GR_ILLEGAL_NOTIFY; | ||
61 | case NVGPU_ERR_NOTIFIER_FIFO_ERROR_MMU_ERR_FLT: | ||
62 | return NVGPU_CHANNEL_FIFO_ERROR_MMU_ERR_FLT; | ||
63 | case NVGPU_ERR_NOTIFIER_PBDMA_ERROR: | ||
64 | return NVGPU_CHANNEL_PBDMA_ERROR; | ||
65 | case NVGPU_ERR_NOTIFIER_FECS_ERR_UNIMP_FIRMWARE_METHOD: | ||
66 | return NVGPU_CHANNEL_FECS_ERR_UNIMP_FIRMWARE_METHOD; | ||
67 | case NVGPU_ERR_NOTIFIER_RESETCHANNEL_VERIF_ERROR: | ||
68 | return NVGPU_CHANNEL_RESETCHANNEL_VERIF_ERROR; | ||
69 | case NVGPU_ERR_NOTIFIER_PBDMA_PUSHBUFFER_CRC_MISMATCH: | ||
70 | return NVGPU_CHANNEL_PBDMA_PUSHBUFFER_CRC_MISMATCH; | ||
71 | } | ||
72 | |||
73 | pr_warn("%s: invalid error_notifier requested %u\n", __func__, error_notifier); | ||
74 | |||
75 | return error_notifier; | ||
76 | } | ||
77 | |||
78 | /** | ||
79 | * nvgpu_set_error_notifier_locked() | ||
80 | * Should be called with ch->error_notifier_mutex held | ||
81 | * | ||
82 | * error should be of the form NVGPU_ERR_NOTIFIER_* | ||
83 | */ | ||
84 | void nvgpu_set_error_notifier_locked(struct channel_gk20a *ch, u32 error) | ||
85 | { | ||
86 | struct nvgpu_channel_linux *priv = ch->os_priv; | ||
87 | |||
88 | error = nvgpu_error_notifier_to_channel_notifier(error); | ||
89 | |||
90 | if (priv->error_notifier.dmabuf) { | ||
91 | struct nvgpu_notification *notification = | ||
92 | priv->error_notifier.notification; | ||
93 | struct timespec time_data; | ||
94 | u64 nsec; | ||
95 | |||
96 | getnstimeofday(&time_data); | ||
97 | nsec = ((u64)time_data.tv_sec) * 1000000000u + | ||
98 | (u64)time_data.tv_nsec; | ||
99 | notification->time_stamp.nanoseconds[0] = | ||
100 | (u32)nsec; | ||
101 | notification->time_stamp.nanoseconds[1] = | ||
102 | (u32)(nsec >> 32); | ||
103 | notification->info32 = error; | ||
104 | notification->status = 0xffff; | ||
105 | |||
106 | nvgpu_err(ch->g, | ||
107 | "error notifier set to %d for ch %d", error, ch->chid); | ||
108 | } | ||
109 | } | ||
110 | |||
111 | /* error should be of the form NVGPU_ERR_NOTIFIER_* */ | ||
112 | void nvgpu_set_error_notifier(struct channel_gk20a *ch, u32 error) | ||
113 | { | ||
114 | struct nvgpu_channel_linux *priv = ch->os_priv; | ||
115 | |||
116 | nvgpu_mutex_acquire(&priv->error_notifier.mutex); | ||
117 | nvgpu_set_error_notifier_locked(ch, error); | ||
118 | nvgpu_mutex_release(&priv->error_notifier.mutex); | ||
119 | } | ||
120 | |||
121 | void nvgpu_set_error_notifier_if_empty(struct channel_gk20a *ch, u32 error) | ||
122 | { | ||
123 | struct nvgpu_channel_linux *priv = ch->os_priv; | ||
124 | |||
125 | nvgpu_mutex_acquire(&priv->error_notifier.mutex); | ||
126 | if (priv->error_notifier.dmabuf) { | ||
127 | struct nvgpu_notification *notification = | ||
128 | priv->error_notifier.notification; | ||
129 | |||
130 | /* Don't overwrite error flag if it is already set */ | ||
131 | if (notification->status != 0xffff) | ||
132 | nvgpu_set_error_notifier_locked(ch, error); | ||
133 | } | ||
134 | nvgpu_mutex_release(&priv->error_notifier.mutex); | ||
135 | } | ||
136 | |||
137 | /* error_notifier should be of the form NVGPU_ERR_NOTIFIER_* */ | ||
138 | bool nvgpu_is_error_notifier_set(struct channel_gk20a *ch, u32 error_notifier) | ||
139 | { | ||
140 | struct nvgpu_channel_linux *priv = ch->os_priv; | ||
141 | bool notifier_set = false; | ||
142 | |||
143 | error_notifier = nvgpu_error_notifier_to_channel_notifier(error_notifier); | ||
144 | |||
145 | nvgpu_mutex_acquire(&priv->error_notifier.mutex); | ||
146 | if (priv->error_notifier.dmabuf) { | ||
147 | struct nvgpu_notification *notification = | ||
148 | priv->error_notifier.notification; | ||
149 | u32 err = notification->info32; | ||
150 | |||
151 | if (err == error_notifier) | ||
152 | notifier_set = true; | ||
153 | } | ||
154 | nvgpu_mutex_release(&priv->error_notifier.mutex); | ||
155 | |||
156 | return notifier_set; | ||
157 | } | ||
158 | |||
40 | static void gk20a_channel_update_runcb_fn(struct work_struct *work) | 159 | static void gk20a_channel_update_runcb_fn(struct work_struct *work) |
41 | { | 160 | { |
42 | struct nvgpu_channel_completion_cb *completion_cb = | 161 | struct nvgpu_channel_completion_cb *completion_cb = |
@@ -128,6 +247,7 @@ static void nvgpu_channel_close_linux(struct channel_gk20a *ch) | |||
128 | static int nvgpu_channel_alloc_linux(struct gk20a *g, struct channel_gk20a *ch) | 247 | static int nvgpu_channel_alloc_linux(struct gk20a *g, struct channel_gk20a *ch) |
129 | { | 248 | { |
130 | struct nvgpu_channel_linux *priv; | 249 | struct nvgpu_channel_linux *priv; |
250 | int err; | ||
131 | 251 | ||
132 | priv = nvgpu_kzalloc(g, sizeof(*priv)); | 252 | priv = nvgpu_kzalloc(g, sizeof(*priv)); |
133 | if (!priv) | 253 | if (!priv) |
@@ -136,6 +256,12 @@ static int nvgpu_channel_alloc_linux(struct gk20a *g, struct channel_gk20a *ch) | |||
136 | ch->os_priv = priv; | 256 | ch->os_priv = priv; |
137 | priv->ch = ch; | 257 | priv->ch = ch; |
138 | 258 | ||
259 | err = nvgpu_mutex_init(&priv->error_notifier.mutex); | ||
260 | if (err) { | ||
261 | nvgpu_kfree(g, priv); | ||
262 | return err; | ||
263 | } | ||
264 | |||
139 | nvgpu_channel_work_completion_init(ch); | 265 | nvgpu_channel_work_completion_init(ch); |
140 | 266 | ||
141 | return 0; | 267 | return 0; |
@@ -143,7 +269,10 @@ static int nvgpu_channel_alloc_linux(struct gk20a *g, struct channel_gk20a *ch) | |||
143 | 269 | ||
144 | static void nvgpu_channel_free_linux(struct gk20a *g, struct channel_gk20a *ch) | 270 | static void nvgpu_channel_free_linux(struct gk20a *g, struct channel_gk20a *ch) |
145 | { | 271 | { |
146 | nvgpu_kfree(g, ch->os_priv); | 272 | struct nvgpu_channel_linux *priv = ch->os_priv; |
273 | |||
274 | nvgpu_mutex_destroy(&priv->error_notifier.mutex); | ||
275 | nvgpu_kfree(g, priv); | ||
147 | } | 276 | } |
148 | 277 | ||
149 | int nvgpu_init_channel_support_linux(struct nvgpu_os_linux *l) | 278 | int nvgpu_init_channel_support_linux(struct nvgpu_os_linux *l) |
diff --git a/drivers/gpu/nvgpu/common/linux/channel.h b/drivers/gpu/nvgpu/common/linux/channel.h index ba1935f3..a4df75d6 100644 --- a/drivers/gpu/nvgpu/common/linux/channel.h +++ b/drivers/gpu/nvgpu/common/linux/channel.h | |||
@@ -42,10 +42,20 @@ struct nvgpu_channel_completion_cb { | |||
42 | struct work_struct work; | 42 | struct work_struct work; |
43 | }; | 43 | }; |
44 | 44 | ||
45 | struct nvgpu_error_notifier { | ||
46 | struct dma_buf *dmabuf; | ||
47 | void *vaddr; | ||
48 | |||
49 | struct nvgpu_notification *notification; | ||
50 | |||
51 | struct nvgpu_mutex mutex; | ||
52 | }; | ||
53 | |||
45 | struct nvgpu_channel_linux { | 54 | struct nvgpu_channel_linux { |
46 | struct channel_gk20a *ch; | 55 | struct channel_gk20a *ch; |
47 | 56 | ||
48 | struct nvgpu_channel_completion_cb completion_cb; | 57 | struct nvgpu_channel_completion_cb completion_cb; |
58 | struct nvgpu_error_notifier error_notifier; | ||
49 | }; | 59 | }; |
50 | 60 | ||
51 | int nvgpu_init_channel_support_linux(struct nvgpu_os_linux *l); | 61 | int nvgpu_init_channel_support_linux(struct nvgpu_os_linux *l); |
diff --git a/drivers/gpu/nvgpu/common/linux/ioctl_channel.c b/drivers/gpu/nvgpu/common/linux/ioctl_channel.c index 0ac50140..67bec31b 100644 --- a/drivers/gpu/nvgpu/common/linux/ioctl_channel.c +++ b/drivers/gpu/nvgpu/common/linux/ioctl_channel.c | |||
@@ -30,6 +30,7 @@ | |||
30 | #include <nvgpu/list.h> | 30 | #include <nvgpu/list.h> |
31 | #include <nvgpu/debug.h> | 31 | #include <nvgpu/debug.h> |
32 | #include <nvgpu/enabled.h> | 32 | #include <nvgpu/enabled.h> |
33 | #include <nvgpu/error_notifier.h> | ||
33 | 34 | ||
34 | #include "gk20a/gk20a.h" | 35 | #include "gk20a/gk20a.h" |
35 | #include "gk20a/dbg_gpu_gk20a.h" | 36 | #include "gk20a/dbg_gpu_gk20a.h" |
@@ -227,15 +228,17 @@ static int gk20a_channel_set_wdt_status(struct channel_gk20a *ch, | |||
227 | 228 | ||
228 | static void gk20a_channel_free_error_notifiers(struct channel_gk20a *ch) | 229 | static void gk20a_channel_free_error_notifiers(struct channel_gk20a *ch) |
229 | { | 230 | { |
230 | nvgpu_mutex_acquire(&ch->error_notifier_mutex); | 231 | struct nvgpu_channel_linux *priv = ch->os_priv; |
231 | if (ch->error_notifier_ref) { | 232 | |
232 | dma_buf_vunmap(ch->error_notifier_ref, ch->error_notifier_va); | 233 | nvgpu_mutex_acquire(&priv->error_notifier.mutex); |
233 | dma_buf_put(ch->error_notifier_ref); | 234 | if (priv->error_notifier.dmabuf) { |
234 | ch->error_notifier_ref = NULL; | 235 | dma_buf_vunmap(priv->error_notifier.dmabuf, priv->error_notifier.vaddr); |
235 | ch->error_notifier = NULL; | 236 | dma_buf_put(priv->error_notifier.dmabuf); |
236 | ch->error_notifier_va = NULL; | 237 | priv->error_notifier.dmabuf = NULL; |
238 | priv->error_notifier.notification = NULL; | ||
239 | priv->error_notifier.vaddr = NULL; | ||
237 | } | 240 | } |
238 | nvgpu_mutex_release(&ch->error_notifier_mutex); | 241 | nvgpu_mutex_release(&priv->error_notifier.mutex); |
239 | } | 242 | } |
240 | 243 | ||
241 | static int gk20a_init_error_notifier(struct channel_gk20a *ch, | 244 | static int gk20a_init_error_notifier(struct channel_gk20a *ch, |
@@ -244,6 +247,7 @@ static int gk20a_init_error_notifier(struct channel_gk20a *ch, | |||
244 | struct dma_buf *dmabuf; | 247 | struct dma_buf *dmabuf; |
245 | void *va; | 248 | void *va; |
246 | u64 end = args->offset + sizeof(struct nvgpu_notification); | 249 | u64 end = args->offset + sizeof(struct nvgpu_notification); |
250 | struct nvgpu_channel_linux *priv = ch->os_priv; | ||
247 | 251 | ||
248 | if (!args->mem) { | 252 | if (!args->mem) { |
249 | pr_err("gk20a_init_error_notifier: invalid memory handle\n"); | 253 | pr_err("gk20a_init_error_notifier: invalid memory handle\n"); |
@@ -273,14 +277,15 @@ static int gk20a_init_error_notifier(struct channel_gk20a *ch, | |||
273 | return -ENOMEM; | 277 | return -ENOMEM; |
274 | } | 278 | } |
275 | 279 | ||
276 | ch->error_notifier = va + args->offset; | 280 | priv->error_notifier.notification = va + args->offset; |
277 | ch->error_notifier_va = va; | 281 | priv->error_notifier.vaddr = va; |
278 | memset(ch->error_notifier, 0, sizeof(struct nvgpu_notification)); | 282 | memset(priv->error_notifier.notification, 0, |
283 | sizeof(struct nvgpu_notification)); | ||
279 | 284 | ||
280 | /* set channel notifiers pointer */ | 285 | /* set channel notifiers pointer */ |
281 | nvgpu_mutex_acquire(&ch->error_notifier_mutex); | 286 | nvgpu_mutex_acquire(&priv->error_notifier.mutex); |
282 | ch->error_notifier_ref = dmabuf; | 287 | priv->error_notifier.dmabuf = dmabuf; |
283 | nvgpu_mutex_release(&ch->error_notifier_mutex); | 288 | nvgpu_mutex_release(&priv->error_notifier.mutex); |
284 | 289 | ||
285 | return 0; | 290 | return 0; |
286 | } | 291 | } |
@@ -1361,7 +1366,7 @@ long gk20a_channel_ioctl(struct file *filp, | |||
1361 | break; | 1366 | break; |
1362 | } | 1367 | } |
1363 | err = ch->g->ops.fifo.force_reset_ch(ch, | 1368 | err = ch->g->ops.fifo.force_reset_ch(ch, |
1364 | NVGPU_CHANNEL_RESETCHANNEL_VERIF_ERROR, true); | 1369 | NVGPU_ERR_NOTIFIER_RESETCHANNEL_VERIF_ERROR, true); |
1365 | gk20a_idle(ch->g); | 1370 | gk20a_idle(ch->g); |
1366 | break; | 1371 | break; |
1367 | case NVGPU_IOCTL_CHANNEL_EVENT_ID_CTRL: | 1372 | case NVGPU_IOCTL_CHANNEL_EVENT_ID_CTRL: |
diff --git a/drivers/gpu/nvgpu/common/linux/vgpu/fifo_vgpu.c b/drivers/gpu/nvgpu/common/linux/vgpu/fifo_vgpu.c index cdcecca5..7a2a02e9 100644 --- a/drivers/gpu/nvgpu/common/linux/vgpu/fifo_vgpu.c +++ b/drivers/gpu/nvgpu/common/linux/vgpu/fifo_vgpu.c | |||
@@ -25,10 +25,13 @@ | |||
25 | #include <nvgpu/atomic.h> | 25 | #include <nvgpu/atomic.h> |
26 | #include <nvgpu/bug.h> | 26 | #include <nvgpu/bug.h> |
27 | #include <nvgpu/barrier.h> | 27 | #include <nvgpu/barrier.h> |
28 | #include <nvgpu/error_notifier.h> | ||
28 | 29 | ||
29 | #include "vgpu.h" | 30 | #include "vgpu.h" |
30 | #include "fifo_vgpu.h" | 31 | #include "fifo_vgpu.h" |
31 | 32 | ||
33 | #include "common/linux/channel.h" | ||
34 | |||
32 | #include <nvgpu/hw/gk20a/hw_fifo_gk20a.h> | 35 | #include <nvgpu/hw/gk20a/hw_fifo_gk20a.h> |
33 | #include <nvgpu/hw/gk20a/hw_ram_gk20a.h> | 36 | #include <nvgpu/hw/gk20a/hw_ram_gk20a.h> |
34 | 37 | ||
@@ -691,7 +694,7 @@ int vgpu_fifo_force_reset_ch(struct channel_gk20a *ch, | |||
691 | 694 | ||
692 | list_for_each_entry(ch_tsg, &tsg->ch_list, ch_entry) { | 695 | list_for_each_entry(ch_tsg, &tsg->ch_list, ch_entry) { |
693 | if (gk20a_channel_get(ch_tsg)) { | 696 | if (gk20a_channel_get(ch_tsg)) { |
694 | gk20a_set_error_notifier(ch_tsg, err_code); | 697 | nvgpu_set_error_notifier(ch_tsg, err_code); |
695 | ch_tsg->has_timedout = true; | 698 | ch_tsg->has_timedout = true; |
696 | gk20a_channel_put(ch_tsg); | 699 | gk20a_channel_put(ch_tsg); |
697 | } | 700 | } |
@@ -699,7 +702,7 @@ int vgpu_fifo_force_reset_ch(struct channel_gk20a *ch, | |||
699 | 702 | ||
700 | nvgpu_rwsem_up_read(&tsg->ch_list_lock); | 703 | nvgpu_rwsem_up_read(&tsg->ch_list_lock); |
701 | } else { | 704 | } else { |
702 | gk20a_set_error_notifier(ch, err_code); | 705 | nvgpu_set_error_notifier(ch, err_code); |
703 | ch->has_timedout = true; | 706 | ch->has_timedout = true; |
704 | } | 707 | } |
705 | 708 | ||
@@ -716,19 +719,14 @@ int vgpu_fifo_force_reset_ch(struct channel_gk20a *ch, | |||
716 | static void vgpu_fifo_set_ctx_mmu_error_ch(struct gk20a *g, | 719 | static void vgpu_fifo_set_ctx_mmu_error_ch(struct gk20a *g, |
717 | struct channel_gk20a *ch) | 720 | struct channel_gk20a *ch) |
718 | { | 721 | { |
719 | nvgpu_mutex_acquire(&ch->error_notifier_mutex); | 722 | /* |
720 | if (ch->error_notifier_ref) { | 723 | * If error code is already set, this mmu fault |
721 | if (ch->error_notifier->status == 0xffff) { | 724 | * was triggered as part of recovery from other |
722 | /* If error code is already set, this mmu fault | 725 | * error condition. |
723 | * was triggered as part of recovery from other | 726 | * Don't overwrite error flag. |
724 | * error condition. | 727 | */ |
725 | * Don't overwrite error flag. */ | 728 | nvgpu_set_error_notifier_if_empty(ch, |
726 | } else { | 729 | NVGPU_ERR_NOTIFIER_FIFO_ERROR_MMU_ERR_FLT); |
727 | gk20a_set_error_notifier_locked(ch, | ||
728 | NVGPU_CHANNEL_FIFO_ERROR_MMU_ERR_FLT); | ||
729 | } | ||
730 | } | ||
731 | nvgpu_mutex_release(&ch->error_notifier_mutex); | ||
732 | 730 | ||
733 | /* mark channel as faulted */ | 731 | /* mark channel as faulted */ |
734 | ch->has_timedout = true; | 732 | ch->has_timedout = true; |
@@ -778,11 +776,11 @@ int vgpu_fifo_isr(struct gk20a *g, struct tegra_vgpu_fifo_intr_info *info) | |||
778 | 776 | ||
779 | switch (info->type) { | 777 | switch (info->type) { |
780 | case TEGRA_VGPU_FIFO_INTR_PBDMA: | 778 | case TEGRA_VGPU_FIFO_INTR_PBDMA: |
781 | gk20a_set_error_notifier(ch, NVGPU_CHANNEL_PBDMA_ERROR); | 779 | nvgpu_set_error_notifier(ch, NVGPU_ERR_NOTIFIER_PBDMA_ERROR); |
782 | break; | 780 | break; |
783 | case TEGRA_VGPU_FIFO_INTR_CTXSW_TIMEOUT: | 781 | case TEGRA_VGPU_FIFO_INTR_CTXSW_TIMEOUT: |
784 | gk20a_set_error_notifier(ch, | 782 | nvgpu_set_error_notifier(ch, |
785 | NVGPU_CHANNEL_FIFO_ERROR_IDLE_TIMEOUT); | 783 | NVGPU_ERR_NOTIFIER_FIFO_ERROR_IDLE_TIMEOUT); |
786 | break; | 784 | break; |
787 | case TEGRA_VGPU_FIFO_INTR_MMU_FAULT: | 785 | case TEGRA_VGPU_FIFO_INTR_MMU_FAULT: |
788 | vgpu_fifo_set_ctx_mmu_error_ch_tsg(g, ch); | 786 | vgpu_fifo_set_ctx_mmu_error_ch_tsg(g, ch); |
diff --git a/drivers/gpu/nvgpu/common/linux/vgpu/gr_vgpu.c b/drivers/gpu/nvgpu/common/linux/vgpu/gr_vgpu.c index dd2ae306..33551d17 100644 --- a/drivers/gpu/nvgpu/common/linux/vgpu/gr_vgpu.c +++ b/drivers/gpu/nvgpu/common/linux/vgpu/gr_vgpu.c | |||
@@ -20,6 +20,7 @@ | |||
20 | 20 | ||
21 | #include <nvgpu/kmem.h> | 21 | #include <nvgpu/kmem.h> |
22 | #include <nvgpu/bug.h> | 22 | #include <nvgpu/bug.h> |
23 | #include <nvgpu/error_notifier.h> | ||
23 | 24 | ||
24 | #include "vgpu.h" | 25 | #include "vgpu.h" |
25 | #include "gr_vgpu.h" | 26 | #include "gr_vgpu.h" |
@@ -941,31 +942,31 @@ int vgpu_gr_isr(struct gk20a *g, struct tegra_vgpu_gr_intr_info *info) | |||
941 | nvgpu_cond_broadcast_interruptible(&ch->semaphore_wq); | 942 | nvgpu_cond_broadcast_interruptible(&ch->semaphore_wq); |
942 | break; | 943 | break; |
943 | case TEGRA_VGPU_GR_INTR_SEMAPHORE_TIMEOUT: | 944 | case TEGRA_VGPU_GR_INTR_SEMAPHORE_TIMEOUT: |
944 | gk20a_set_error_notifier(ch, | 945 | nvgpu_set_error_notifier(ch, |
945 | NVGPU_CHANNEL_GR_SEMAPHORE_TIMEOUT); | 946 | NVGPU_ERR_NOTIFIER_GR_SEMAPHORE_TIMEOUT); |
946 | break; | 947 | break; |
947 | case TEGRA_VGPU_GR_INTR_ILLEGAL_NOTIFY: | 948 | case TEGRA_VGPU_GR_INTR_ILLEGAL_NOTIFY: |
948 | gk20a_set_error_notifier(ch, | 949 | nvgpu_set_error_notifier(ch, |
949 | NVGPU_CHANNEL_GR_ILLEGAL_NOTIFY); | 950 | NVGPU_ERR_NOTIFIER_GR_ILLEGAL_NOTIFY); |
950 | case TEGRA_VGPU_GR_INTR_ILLEGAL_METHOD: | 951 | case TEGRA_VGPU_GR_INTR_ILLEGAL_METHOD: |
951 | break; | 952 | break; |
952 | case TEGRA_VGPU_GR_INTR_ILLEGAL_CLASS: | 953 | case TEGRA_VGPU_GR_INTR_ILLEGAL_CLASS: |
953 | gk20a_set_error_notifier(ch, | 954 | nvgpu_set_error_notifier(ch, |
954 | NVGPU_CHANNEL_GR_ERROR_SW_NOTIFY); | 955 | NVGPU_ERR_NOTIFIER_GR_ERROR_SW_NOTIFY); |
955 | break; | 956 | break; |
956 | case TEGRA_VGPU_GR_INTR_FECS_ERROR: | 957 | case TEGRA_VGPU_GR_INTR_FECS_ERROR: |
957 | break; | 958 | break; |
958 | case TEGRA_VGPU_GR_INTR_CLASS_ERROR: | 959 | case TEGRA_VGPU_GR_INTR_CLASS_ERROR: |
959 | gk20a_set_error_notifier(ch, | 960 | nvgpu_set_error_notifier(ch, |
960 | NVGPU_CHANNEL_GR_ERROR_SW_NOTIFY); | 961 | NVGPU_ERR_NOTIFIER_GR_ERROR_SW_NOTIFY); |
961 | break; | 962 | break; |
962 | case TEGRA_VGPU_GR_INTR_FIRMWARE_METHOD: | 963 | case TEGRA_VGPU_GR_INTR_FIRMWARE_METHOD: |
963 | gk20a_set_error_notifier(ch, | 964 | nvgpu_set_error_notifier(ch, |
964 | NVGPU_CHANNEL_GR_ERROR_SW_NOTIFY); | 965 | NVGPU_ERR_NOTIFIER_GR_ERROR_SW_NOTIFY); |
965 | break; | 966 | break; |
966 | case TEGRA_VGPU_GR_INTR_EXCEPTION: | 967 | case TEGRA_VGPU_GR_INTR_EXCEPTION: |
967 | gk20a_set_error_notifier(ch, | 968 | nvgpu_set_error_notifier(ch, |
968 | NVGPU_CHANNEL_GR_ERROR_SW_NOTIFY); | 969 | NVGPU_ERR_NOTIFIER_GR_ERROR_SW_NOTIFY); |
969 | break; | 970 | break; |
970 | case TEGRA_VGPU_GR_INTR_SM_EXCEPTION: | 971 | case TEGRA_VGPU_GR_INTR_SM_EXCEPTION: |
971 | gk20a_dbg_gpu_post_events(ch); | 972 | gk20a_dbg_gpu_post_events(ch); |