diff options
Diffstat (limited to 'drivers/gpu/nvgpu/common')
-rw-r--r-- | drivers/gpu/nvgpu/common/linux/clk.c | 15 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/common/linux/sysfs.c | 17 |
2 files changed, 15 insertions, 17 deletions
diff --git a/drivers/gpu/nvgpu/common/linux/clk.c b/drivers/gpu/nvgpu/common/linux/clk.c index 8bffc07b..a0e56455 100644 --- a/drivers/gpu/nvgpu/common/linux/clk.c +++ b/drivers/gpu/nvgpu/common/linux/clk.c | |||
@@ -84,15 +84,18 @@ static int nvgpu_linux_clk_set_rate(struct gk20a *g, | |||
84 | return ret; | 84 | return ret; |
85 | } | 85 | } |
86 | 86 | ||
87 | static unsigned long nvgpu_linux_get_fmax_at_vmin_safe(struct clk_gk20a *clk) | 87 | static unsigned long nvgpu_linux_get_fmax_at_vmin_safe(struct gk20a *g) |
88 | { | 88 | { |
89 | /* | 89 | /* |
90 | * On Tegra GPU clock exposed to frequency governor is a shared user on | 90 | * On Tegra platforms with GPCPLL bus (gbus) GPU tegra_clk clock exposed |
91 | * GPCPLL bus (gbus). The latter can be accessed as GPU clock parent. | 91 | * to frequency governor is a shared user on the gbus. The latter can be |
92 | * Respectively the grandparent is PLL reference clock. | 92 | * accessed as GPU clock parent, and incorporate DVFS related data. |
93 | */ | 93 | */ |
94 | return tegra_dvfs_get_fmax_at_vmin_safe_t( | 94 | if (g->clk.tegra_clk) |
95 | clk_get_parent(clk->tegra_clk)); | 95 | return tegra_dvfs_get_fmax_at_vmin_safe_t( |
96 | clk_get_parent(g->clk.tegra_clk)); | ||
97 | |||
98 | return 0; | ||
96 | } | 99 | } |
97 | 100 | ||
98 | static u32 nvgpu_linux_get_ref_clock_rate(struct gk20a *g) | 101 | static u32 nvgpu_linux_get_ref_clock_rate(struct gk20a *g) |
diff --git a/drivers/gpu/nvgpu/common/linux/sysfs.c b/drivers/gpu/nvgpu/common/linux/sysfs.c index 1f6da803..e425e153 100644 --- a/drivers/gpu/nvgpu/common/linux/sysfs.c +++ b/drivers/gpu/nvgpu/common/linux/sysfs.c | |||
@@ -17,9 +17,6 @@ | |||
17 | #include <linux/device.h> | 17 | #include <linux/device.h> |
18 | #include <linux/pm_runtime.h> | 18 | #include <linux/pm_runtime.h> |
19 | #include <linux/fb.h> | 19 | #include <linux/fb.h> |
20 | #ifdef CONFIG_TEGRA_DVFS | ||
21 | #include <soc/tegra/tegra-dvfs.h> | ||
22 | #endif | ||
23 | 20 | ||
24 | #include <nvgpu/kmem.h> | 21 | #include <nvgpu/kmem.h> |
25 | #include <nvgpu/nvhost.h> | 22 | #include <nvgpu/nvhost.h> |
@@ -781,21 +778,19 @@ static ssize_t emc3d_ratio_read(struct device *dev, | |||
781 | 778 | ||
782 | static DEVICE_ATTR(emc3d_ratio, ROOTRW, emc3d_ratio_read, emc3d_ratio_store); | 779 | static DEVICE_ATTR(emc3d_ratio, ROOTRW, emc3d_ratio_read, emc3d_ratio_store); |
783 | 780 | ||
784 | #ifdef CONFIG_TEGRA_DVFS | ||
785 | static ssize_t fmax_at_vmin_safe_read(struct device *dev, | 781 | static ssize_t fmax_at_vmin_safe_read(struct device *dev, |
786 | struct device_attribute *attr, char *buf) | 782 | struct device_attribute *attr, char *buf) |
787 | { | 783 | { |
788 | struct gk20a *g = get_gk20a(dev); | 784 | struct gk20a *g = get_gk20a(dev); |
789 | unsigned long gpu_fmax_at_vmin_hz = 0; | 785 | unsigned long gpu_fmax_at_vmin_hz = 0; |
790 | struct clk *clk = g->clk.tegra_clk; | ||
791 | 786 | ||
792 | gpu_fmax_at_vmin_hz = tegra_dvfs_get_fmax_at_vmin_safe_t(clk); | 787 | if (g->ops.clk.get_fmax_at_vmin_safe) |
788 | gpu_fmax_at_vmin_hz = g->ops.clk.get_fmax_at_vmin_safe(g); | ||
793 | 789 | ||
794 | return snprintf(buf, PAGE_SIZE, "%d\n", (int)(gpu_fmax_at_vmin_hz)); | 790 | return snprintf(buf, PAGE_SIZE, "%d\n", (int)(gpu_fmax_at_vmin_hz)); |
795 | } | 791 | } |
796 | 792 | ||
797 | static DEVICE_ATTR(fmax_at_vmin_safe, S_IRUGO, fmax_at_vmin_safe_read, NULL); | 793 | static DEVICE_ATTR(fmax_at_vmin_safe, S_IRUGO, fmax_at_vmin_safe_read, NULL); |
798 | #endif | ||
799 | 794 | ||
800 | #ifdef CONFIG_PM | 795 | #ifdef CONFIG_PM |
801 | static ssize_t force_idle_store(struct device *dev, | 796 | static ssize_t force_idle_store(struct device *dev, |
@@ -1116,9 +1111,9 @@ void nvgpu_remove_sysfs(struct device *dev) | |||
1116 | device_remove_file(dev, &dev_attr_elpg_enable); | 1111 | device_remove_file(dev, &dev_attr_elpg_enable); |
1117 | device_remove_file(dev, &dev_attr_mscg_enable); | 1112 | device_remove_file(dev, &dev_attr_mscg_enable); |
1118 | device_remove_file(dev, &dev_attr_emc3d_ratio); | 1113 | device_remove_file(dev, &dev_attr_emc3d_ratio); |
1119 | #ifdef CONFIG_TEGRA_DVFS | 1114 | |
1120 | device_remove_file(dev, &dev_attr_fmax_at_vmin_safe); | 1115 | device_remove_file(dev, &dev_attr_fmax_at_vmin_safe); |
1121 | #endif | 1116 | |
1122 | device_remove_file(dev, &dev_attr_counters); | 1117 | device_remove_file(dev, &dev_attr_counters); |
1123 | device_remove_file(dev, &dev_attr_counters_reset); | 1118 | device_remove_file(dev, &dev_attr_counters_reset); |
1124 | device_remove_file(dev, &dev_attr_load); | 1119 | device_remove_file(dev, &dev_attr_load); |
@@ -1167,9 +1162,9 @@ int nvgpu_create_sysfs(struct device *dev) | |||
1167 | error |= device_create_file(dev, &dev_attr_mscg_enable); | 1162 | error |= device_create_file(dev, &dev_attr_mscg_enable); |
1168 | error |= device_create_file(dev, &dev_attr_emc3d_ratio); | 1163 | error |= device_create_file(dev, &dev_attr_emc3d_ratio); |
1169 | error |= device_create_file(dev, &dev_attr_ldiv_slowdown_factor); | 1164 | error |= device_create_file(dev, &dev_attr_ldiv_slowdown_factor); |
1170 | #ifdef CONFIG_TEGRA_DVFS | 1165 | |
1171 | error |= device_create_file(dev, &dev_attr_fmax_at_vmin_safe); | 1166 | error |= device_create_file(dev, &dev_attr_fmax_at_vmin_safe); |
1172 | #endif | 1167 | |
1173 | error |= device_create_file(dev, &dev_attr_counters); | 1168 | error |= device_create_file(dev, &dev_attr_counters); |
1174 | error |= device_create_file(dev, &dev_attr_counters_reset); | 1169 | error |= device_create_file(dev, &dev_attr_counters_reset); |
1175 | error |= device_create_file(dev, &dev_attr_load); | 1170 | error |= device_create_file(dev, &dev_attr_load); |