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Diffstat (limited to 'drivers/gpu/nvgpu/common')
-rw-r--r--drivers/gpu/nvgpu/common/linux/ioctl_channel.c4
-rw-r--r--drivers/gpu/nvgpu/common/linux/ioctl_ctrl.c8
-rw-r--r--drivers/gpu/nvgpu/common/linux/kmem.c2
-rw-r--r--drivers/gpu/nvgpu/common/linux/vm.c2
4 files changed, 8 insertions, 8 deletions
diff --git a/drivers/gpu/nvgpu/common/linux/ioctl_channel.c b/drivers/gpu/nvgpu/common/linux/ioctl_channel.c
index c7adb76c..2502ff30 100644
--- a/drivers/gpu/nvgpu/common/linux/ioctl_channel.c
+++ b/drivers/gpu/nvgpu/common/linux/ioctl_channel.c
@@ -203,7 +203,7 @@ static int gk20a_init_error_notifier(struct channel_gk20a *ch,
203 203
204 if (end > dmabuf->size || end < sizeof(struct nvgpu_notification)) { 204 if (end > dmabuf->size || end < sizeof(struct nvgpu_notification)) {
205 dma_buf_put(dmabuf); 205 dma_buf_put(dmabuf);
206 nvgpu_err(ch->g, "gk20a_init_error_notifier: invalid offset\n"); 206 nvgpu_err(ch->g, "gk20a_init_error_notifier: invalid offset");
207 return -EINVAL; 207 return -EINVAL;
208 } 208 }
209 209
@@ -462,7 +462,7 @@ static int gk20a_channel_wait(struct channel_gk20a *ch,
462 462
463 if (end > dmabuf->size || end < sizeof(struct notification)) { 463 if (end > dmabuf->size || end < sizeof(struct notification)) {
464 dma_buf_put(dmabuf); 464 dma_buf_put(dmabuf);
465 nvgpu_err(g, "invalid notifier offset\n"); 465 nvgpu_err(g, "invalid notifier offset");
466 return -EINVAL; 466 return -EINVAL;
467 } 467 }
468 468
diff --git a/drivers/gpu/nvgpu/common/linux/ioctl_ctrl.c b/drivers/gpu/nvgpu/common/linux/ioctl_ctrl.c
index 8d95dd35..0f3d762d 100644
--- a/drivers/gpu/nvgpu/common/linux/ioctl_ctrl.c
+++ b/drivers/gpu/nvgpu/common/linux/ioctl_ctrl.c
@@ -357,7 +357,7 @@ static int nvgpu_gpu_ioctl_set_mmu_debug_mode(
357 struct nvgpu_gpu_mmu_debug_mode_args *args) 357 struct nvgpu_gpu_mmu_debug_mode_args *args)
358{ 358{
359 if (gk20a_busy(g)) { 359 if (gk20a_busy(g)) {
360 nvgpu_err(g, "failed to power on gpu\n"); 360 nvgpu_err(g, "failed to power on gpu");
361 return -EINVAL; 361 return -EINVAL;
362 } 362 }
363 363
@@ -559,7 +559,7 @@ static inline int get_timestamps_zipper(struct gk20a *g,
559 unsigned int i = 0; 559 unsigned int i = 0;
560 560
561 if (gk20a_busy(g)) { 561 if (gk20a_busy(g)) {
562 nvgpu_err(g, "GPU not powered on\n"); 562 nvgpu_err(g, "GPU not powered on");
563 err = -EINVAL; 563 err = -EINVAL;
564 goto end; 564 goto end;
565 } 565 }
@@ -598,7 +598,7 @@ static int nvgpu_gpu_get_cpu_time_correlation_info(
598 get_cpu_timestamp = get_cpu_timestamp_timeofday; 598 get_cpu_timestamp = get_cpu_timestamp_timeofday;
599 break; 599 break;
600 default: 600 default:
601 nvgpu_err(g, "invalid cpu clock source id\n"); 601 nvgpu_err(g, "invalid cpu clock source id");
602 return -EINVAL; 602 return -EINVAL;
603 } 603 }
604 604
@@ -663,7 +663,7 @@ static int nvgpu_gpu_get_engine_info(
663 break; 663 break;
664 664
665 default: 665 default:
666 nvgpu_err(g, "Unmapped engine enum %u\n", 666 nvgpu_err(g, "Unmapped engine enum %u",
667 engine_enum); 667 engine_enum);
668 continue; 668 continue;
669 } 669 }
diff --git a/drivers/gpu/nvgpu/common/linux/kmem.c b/drivers/gpu/nvgpu/common/linux/kmem.c
index 0d185e56..8422d761 100644
--- a/drivers/gpu/nvgpu/common/linux/kmem.c
+++ b/drivers/gpu/nvgpu/common/linux/kmem.c
@@ -819,7 +819,7 @@ void nvgpu_kmem_fini(struct gk20a *g, int flags)
819 if (flags & NVGPU_KMEM_FINI_WARN) { 819 if (flags & NVGPU_KMEM_FINI_WARN) {
820 WARN(1, "Letting %d allocs leak!!\n", count); 820 WARN(1, "Letting %d allocs leak!!\n", count);
821 } else if (flags & NVGPU_KMEM_FINI_BUG) { 821 } else if (flags & NVGPU_KMEM_FINI_BUG) {
822 nvgpu_err(g, "Letting %d allocs leak!!\n", count); 822 nvgpu_err(g, "Letting %d allocs leak!!", count);
823 BUG(); 823 BUG();
824 } 824 }
825 } 825 }
diff --git a/drivers/gpu/nvgpu/common/linux/vm.c b/drivers/gpu/nvgpu/common/linux/vm.c
index 9238a9df..c2d80e2d 100644
--- a/drivers/gpu/nvgpu/common/linux/vm.c
+++ b/drivers/gpu/nvgpu/common/linux/vm.c
@@ -399,7 +399,7 @@ clean_up:
399 gk20a_mm_unpin(g->dev, dmabuf, bfr.sgt); 399 gk20a_mm_unpin(g->dev, dmabuf, bfr.sgt);
400 400
401 nvgpu_mutex_release(&vm->update_gmmu_lock); 401 nvgpu_mutex_release(&vm->update_gmmu_lock);
402 nvgpu_log_info(g, "err=%d\n", err); 402 nvgpu_log_info(g, "err=%d", err);
403 return 0; 403 return 0;
404} 404}
405 405