2 files changed, 61 insertions, 3 deletions

diff --git a/drivers/gpu/nvgpu/common/linux/nvgpu_mem.c b/drivers/gpu/nvgpu/common/linux/nvgpu_mem.c
index 34fd6626..e4991d0d 100644
--- a/drivers/gpu/nvgpu/common/linux/nvgpu_mem.c
+++ b/drivers/gpu/nvgpu/common/linux/nvgpu_mem.c
@@ -15,6 +15,7 @@
  */
 
 #include <nvgpu/dma.h>
+#include <nvgpu/gmmu.h>
 #include <nvgpu/nvgpu_mem.h>
 #include <nvgpu/page_allocator.h>
 #include <nvgpu/log.h>
@@ -23,6 +24,8 @@
 
 #include <nvgpu/linux/dma.h>
 
+#include "os_linux.h"
+
 #include "gk20a/gk20a.h"
 #include "gk20a/mm_gk20a.h"
 
@@ -247,6 +250,61 @@ void nvgpu_memset(struct gk20a *g, struct nvgpu_mem *mem, u32 offset,
 }
 
 /*
+ * Obtain a SYSMEM address from a Linux SGL. This should eventually go away
+ * and/or become private to this file once all bad usages of Linux SGLs are
+ * cleaned up in the driver.
+ */
+u64 nvgpu_mem_get_addr_sgl(struct gk20a *g, struct scatterlist *sgl)
+{
+        struct nvgpu_os_linux *l = container_of(g, struct nvgpu_os_linux, g);
+
+        if (!device_is_iommuable(l->dev))
+                return g->ops.mm.gpu_phys_addr(g, NULL, sg_phys(sgl));
+
+        if (sg_dma_address(sgl) == 0)
+                return g->ops.mm.gpu_phys_addr(g, NULL, sg_phys(sgl));
+
+        if (sg_dma_address(sgl) == DMA_ERROR_CODE)
+                return 0;
+
+        return gk20a_mm_smmu_vaddr_translate(g, sg_dma_address(sgl));
+}
+
+/*
+ * Obtain the address the GPU should use from the %mem assuming this is a SYSMEM
+ * allocation.
+ */
+static u64 nvgpu_mem_get_addr_sysmem(struct gk20a *g, struct nvgpu_mem *mem)
+{
+        return nvgpu_mem_get_addr_sgl(g, mem->priv.sgt->sgl);
+}
+
+/*
+ * Return the base address of %mem. Handles whether this is a VIDMEM or SYSMEM
+ * allocation.
+ *
+ * %attrs can be NULL. If it is not NULL then it may be inspected to determine
+ * if the address needs to be modified before writing into a PTE.
+ */
+u64 nvgpu_mem_get_addr(struct gk20a *g, struct nvgpu_mem *mem)
+{
+        struct nvgpu_page_alloc *alloc;
+
+        if (mem->aperture == APERTURE_SYSMEM)
+                return nvgpu_mem_get_addr_sysmem(g, mem);
+
+        /*
+         * Otherwise get the vidmem address.
+         */
+        alloc = get_vidmem_page_alloc(mem->priv.sgt->sgl);
+
+        /* This API should not be used with > 1 chunks */
+        WARN_ON(alloc->nr_chunks != 1);
+
+        return alloc->base;
+}
+
+/*
  * Be careful how you use this! You are responsible for correctly freeing this
  * memory.
  */
diff --git a/drivers/gpu/nvgpu/common/mm/gmmu.c b/drivers/gpu/nvgpu/common/mm/gmmu.c
index 1be87c85..30be1b85 100644
--- a/drivers/gpu/nvgpu/common/mm/gmmu.c
+++ b/drivers/gpu/nvgpu/common/mm/gmmu.c
@@ -201,7 +201,7 @@ u64 nvgpu_pde_phys_addr(struct gk20a *g, struct nvgpu_gmmu_pd *pd)
         if (g->mm.has_physical_mode)
                 page_addr = sg_phys(pd->mem->priv.sgt->sgl);
         else
-                page_addr = nvgpu_mem_get_base_addr(g, pd->mem, 0);
+                page_addr = nvgpu_mem_get_addr(g, pd->mem);
 
         return page_addr + pd->mem_offs;
 }
@@ -559,7 +559,7 @@ static int __nvgpu_gmmu_update_page_table_sysmem(struct vm_gk20a *vm,
         sgl = sgt->sgl;
 
         if (!g->mm.bypass_smmu) {
-                u64 io_addr = g->ops.mm.get_iova_addr(g, sgl, 0);
+                u64 io_addr = nvgpu_mem_get_addr_sgl(g, sgl);
 
                 io_addr += space_to_skip;
 
@@ -670,7 +670,7 @@ static int __nvgpu_gmmu_update_page_table(struct vm_gk20a *vm,
 
                         phys_addr = alloc->base;
                 } else
-                        phys_addr = g->ops.mm.get_iova_addr(g, sgt->sgl, 0);
+                        phys_addr = nvgpu_mem_get_addr_sgl(g, sgt->sgl);
         }
 
         __gmmu_dbg(g, attrs,